<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/pci/switch/switchtec.c, branch linux-5.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y</id>
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<updated>2019-06-15T09:53:00Z</updated>
<entry>
<title>switchtec: Fix unintended mask of MRPC event</title>
<updated>2019-06-15T09:53:00Z</updated>
<author>
<name>Wesley Sheng</name>
<email>wesley.sheng@microchip.com</email>
</author>
<published>2019-04-15T14:41:42Z</published>
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<id>urn:sha1:e86a0475c5207eb24bee62b9377e4457323ecd37</id>
<content type='text'>
[ Upstream commit 083c1b5e50b701899dc32445efa8b153685260d5 ]

When running application tool switchtec-user's `firmware update` and `event
wait` commands concurrently, sometimes the firmware update speed reduced
significantly.

It is because when the MRPC event happened after MRPC event occurrence
check but before the event mask loop reaches its header register in event
ISR, the MRPC event would be masked unintentionally.  Since there's no
chance to enable it again except for a module reload, all the following
MRPC execution completion checks time out.

Fix this bug by skipping the mask operation for MRPC event in event ISR,
same as what we already do for LINK event.

Fixes: 52eabba5bcdb ("switchtec: Add IOCTLs to the Switchtec driver")
Signed-off-by: Wesley Sheng &lt;wesley.sheng@microchip.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Logan Gunthorpe &lt;logang@deltatee.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>cross-tree: phase out dma_zalloc_coherent()</title>
<updated>2019-01-08T12:58:37Z</updated>
<author>
<name>Luis Chamberlain</name>
<email>mcgrof@kernel.org</email>
</author>
<published>2019-01-04T08:23:09Z</published>
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<id>urn:sha1:750afb08ca71310fcf0c4e2cb1565c63b8235b60</id>
<content type='text'>
We already need to zero out memory for dma_alloc_coherent(), as such
using dma_zalloc_coherent() is superflous. Phase it out.

This change was generated with the following Coccinelle SmPL patch:

@ replace_dma_zalloc_coherent @
expression dev, size, data, handle, flags;
@@

-dma_zalloc_coherent(dev, size, handle, flags)
+dma_alloc_coherent(dev, size, handle, flags)

Suggested-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Luis Chamberlain &lt;mcgrof@kernel.org&gt;
[hch: re-ran the script on the latest tree]
Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
</content>
</entry>
<entry>
<title>switchtec: Add MRPC DMA mode support</title>
<updated>2018-12-13T15:03:32Z</updated>
<author>
<name>Wesley Sheng</name>
<email>wesley.sheng@microchip.com</email>
</author>
<published>2018-12-10T09:12:24Z</published>
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<id>urn:sha1:f7eb7b8a4f72b0d9dea69b09f58185ffab97fd35</id>
<content type='text'>
MRPC normal mode requires the host to read the MRPC command status and
output data from BAR.  This results in high latency responses from the
Memory Read TLP and potential Completion Timeout (CTO).

Add support for MRPC DMA mode, including related macro definitions and data
structures and code to:

  * Retrieve MRPC DMA mode version from adapter firmware
  * Allocate DMA buffer, register ISR, and enable DMA during init
  * Check MRPC execution status and get execution results from DMA buffer
  * Release DMA buffer and disable DMA function when unloading module

MRPC DMA mode is a new feature of firmware, and the driver will fall back
to MRPC normal mode if there is no support in the legacy firmware.

Add a module parameter, "use_dma_mrpc", to select between MRPC DMA mode and
MRPC normal mode.  Since the driver automatically detects DMA support in
the firmware, this parameter is just for debugging and testing.

Include &lt;linux/io-64-nonatomic-lo-hi.h&gt; so that readq/writeq is replaced by
two readl/writel on systems that do not support it.

Signed-off-by: Wesley Sheng &lt;wesley.sheng@microchip.com&gt;
[bhelgaas: changelog, simplify dma_ver check]
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Logan Gunthorpe &lt;logang@deltatee.com&gt;</content>
</entry>
<entry>
<title>switchtec: Improve MRPC efficiency by enabling write combining</title>
<updated>2018-12-13T15:03:24Z</updated>
<author>
<name>Kelvin Cao</name>
<email>kelvin.cao@microchip.com</email>
</author>
<published>2018-12-10T09:12:23Z</published>
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<id>urn:sha1:52d8db8e0cd7c28316514568fe5df0cfd4fa2075</id>
<content type='text'>
The MRPC Input buffer is mostly memory without any side effects, so we
can improve the access time by enabling write combining on this region
of the BAR.

In a few places, we still need to flush the WC buffer.  To do this, we
simply read from the Outbound Doorbell register because reads to this
register are processed by low latency hardware.

Signed-off-by: Kelvin Cao &lt;kelvin.cao@microchip.com&gt;
Signed-off-by: Wesley Sheng &lt;wesley.sheng@microchip.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Logan Gunthorpe &lt;logang@deltatee.com&gt;</content>
</entry>
<entry>
<title>switchtec: Fix SWITCHTEC_IOCTL_EVENT_IDX_ALL flags overwrite</title>
<updated>2018-12-12T22:32:16Z</updated>
<author>
<name>Joey Zhang</name>
<email>joey.zhang@microchip.com</email>
</author>
<published>2018-12-10T09:12:22Z</published>
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<id>urn:sha1:e4a7dca5de625018b29417ecc39dc5037d9a5a36</id>
<content type='text'>
In the ioctl_event_ctl() SWITCHTEC_IOCTL_EVENT_IDX_ALL case, we call
event_ctl() several times with the same "ctl" struct.  Each call clobbers
ctl.flags, which leads to the problem that we may not actually enable or
disable all events as the user requested.

Preserve the event flag value with a temporary variable.

Fixes: 52eabba5bcdb ("switchtec: Add IOCTLs to the Switchtec driver")
Signed-off-by: Joey Zhang &lt;joey.zhang@microchip.com&gt;
Signed-off-by: Wesley Sheng &lt;wesley.sheng@microchip.com&gt;
[bhelgaas: changelog]
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Logan Gunthorpe &lt;logang@deltatee.com&gt;</content>
</entry>
<entry>
<title>switchtec: Set DMA coherent mask</title>
<updated>2018-12-12T22:31:54Z</updated>
<author>
<name>Boris Glimcher</name>
<email>Boris.Glimcher@emc.com</email>
</author>
<published>2018-12-10T09:12:21Z</published>
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<id>urn:sha1:aff614c6339c1ee2a74ea0afc491d6e30d0bad61</id>
<content type='text'>
Switchtec hardware supports 64-bit DMA, so set the correct DMA mask.  This
allows the CMA to allocate larger buffers for memory windows.

Signed-off-by: Boris Glimcher &lt;Boris.Glimcher@emc.com&gt;
Signed-off-by: Wesley Sheng &lt;wesley.sheng@microchip.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Logan Gunthorpe &lt;logang@deltatee.com&gt;</content>
</entry>
<entry>
<title>switchtec: Remove immediate status check after submitting MRPC command</title>
<updated>2018-12-12T22:30:03Z</updated>
<author>
<name>Kelvin Cao</name>
<email>kelvin.cao@microchip.com</email>
</author>
<published>2018-12-10T09:12:20Z</published>
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<id>urn:sha1:526180408b815aa7b96fd48bd23cdd33ef04e38e</id>
<content type='text'>
After submitting a Firmware Download MRPC command, Switchtec firmware will
delay Management EP BAR MemRd TLP responses by more than 10ms.  This is a
firmware limitation.  Delayed MemRd completions are a problem for systems
with a low Completion Timeout (CTO).

The current driver checks the MRPC status immediately after submitting an
MRPC command, which results in a delayed MemRd completion that may cause a
Completion Timeout.

Remove the immediate status check and rely on the check after receiving an
interrupt or timing out.

This is only a software workaround to the READ issue and a proper fix of
this should be done in firmware.

Fixes: 080b47def5e5 ("MicroSemi Switchtec management interface driver")
Signed-off-by: Kelvin Cao &lt;kelvin.cao@microchip.com&gt;
Signed-off-by: Wesley Sheng &lt;wesley.sheng@microchip.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Logan Gunthorpe &lt;logang@deltatee.com&gt;</content>
</entry>
<entry>
<title>switchtec: Fix Spectre v1 vulnerability</title>
<updated>2018-09-11T13:47:40Z</updated>
<author>
<name>Gustavo A. R. Silva</name>
<email>gustavo@embeddedor.com</email>
</author>
<published>2018-08-16T19:06:46Z</published>
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<id>urn:sha1:46feb6b495f7628a6dbf36c4e6d80faf378372d4</id>
<content type='text'>
p.port can is indirectly controlled by user-space, hence leading to
a potential exploitation of the Spectre variant 1 vulnerability.

This issue was detected with the help of Smatch:

  drivers/pci/switch/switchtec.c:912 ioctl_port_to_pff() warn: potential spectre issue 'pcfg-&gt;dsp_pff_inst_id' [r]

Fix this by sanitizing p.port before using it to index
pcfg-&gt;dsp_pff_inst_id

Notice that given that speculation windows are large, the policy is to kill
the speculation on the first load and not worry if it can be completed with
a dependent load/store [1].

[1] https://marc.info/?l=linux-kernel&amp;m=152449131114778&amp;w=2

Signed-off-by: Gustavo A. R. Silva &lt;gustavo@embeddedor.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Logan Gunthorpe &lt;logang@deltatee.com&gt;
Cc: stable@vger.kernel.org</content>
</entry>
<entry>
<title>switchtec: Use generic PCI Vendor ID and Class Code</title>
<updated>2018-06-30T01:16:44Z</updated>
<author>
<name>Doug Meyer</name>
<email>dmeyer@gigaio.com</email>
</author>
<published>2018-05-23T20:18:05Z</published>
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<id>urn:sha1:cfdfc14e7fb8ae77290e9d5afaeecc0a234a3846</id>
<content type='text'>
Move the Microsemi Switchtec PCI Vendor ID (same as
PCI_VENDOR_ID_PMC_Sierra) to pci_ids.h.   Also, replace Microsemi class
constants with the standard PCI definitions.

Signed-off-by: Doug Meyer &lt;dmeyer@gigaio.com&gt;
[bhelgaas: restore SPDX (I assume it was removed by mistake), remove
device ID definitions]
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Logan Gunthorpe &lt;logang@deltatee.com&gt;</content>
</entry>
<entry>
<title>vfs: do bulk POLL* -&gt; EPOLL* replacement</title>
<updated>2018-02-11T22:34:03Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2018-02-11T22:34:03Z</published>
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<id>urn:sha1:a9a08845e9acbd224e4ee466f5c1275ed50054e8</id>
<content type='text'>
This is the mindless scripted replacement of kernel use of POLL*
variables as described by Al, done by this script:

    for V in IN OUT PRI ERR RDNORM RDBAND WRNORM WRBAND HUP RDHUP NVAL MSG; do
        L=`git grep -l -w POLL$V | grep -v '^t' | grep -v /um/ | grep -v '^sa' | grep -v '/poll.h$'|grep -v '^D'`
        for f in $L; do sed -i "-es/^\([^\"]*\)\(\&lt;POLL$V\&gt;\)/\\1E\\2/" $f; done
    done

with de-mangling cleanups yet to come.

NOTE! On almost all architectures, the EPOLL* constants have the same
values as the POLL* constants do.  But they keyword here is "almost".
For various bad reasons they aren't the same, and epoll() doesn't
actually work quite correctly in some cases due to this on Sparc et al.

The next patch from Al will sort out the final differences, and we
should be all done.

Scripted-by: Al Viro &lt;viro@zeniv.linux.org.uk&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
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