kernel/drivers/pci/controller/pcie-xilinx.c, branch linux-6.18.y

PCI: xilinx: Fix INTx IRQ domain leak in error paths

2026-02-26T22:59:15Z

[ Upstream commit f42b3c053b1554d66af6fe45bb1ef357464c0456 ] In xilinx_pcie_init_irq_domain(), if xilinx_allocate_msi_domains() fails after pcie->leg_domain has been successfully created via irq_domain_create_linear(), the function returns directly without cleaning up the allocated IRQ domain, resulting in a resource leak. In xilinx_free_msi_domains(), pcie->leg_domain is also neglected. Add irq_domain_remove() call in the error path to properly release the IRQ domain before returning the error. Also rename xilinx_free_msi_domains() to xilinx_free_irq_domains() and add the release of pcie->leg_domain to it. Fixes: 313b64c3ae52 ("PCI: xilinx: Convert to MSI domains") Suggested-by: Manivannan Sadhasivam Signed-off-by: Haotian Zhang Signed-off-by: Manivannan Sadhasivam Link: https://patch.msgid.link/20251219021615.965-1-vulab@iscas.ac.cn Signed-off-by: Sasha Levin

PCI: xilinx: Fix NULL pointer dereference in xilinx_pcie_intr_handler()

2025-08-12T16:31:24Z

f29861aa301c5 ("PCI: xilinx: Switch to msi_create_parent_irq_domain()") changed xilinx_pcie::msi_domain from child devices' interrupt domain to Xilinx AXI bridge's interrupt domain. However, xilinx_pcie_intr_handler() wasn't changed and still reads Xilinx AXI bridge's interrupt domain from xilinx_pcie::msi_domain->parent. This pointer is NULL now. Update xilinx_pcie_intr_handler() to read the correct interrupt domain pointer. Fixes: f29861aa301c5 ("PCI: xilinx: Switch to msi_create_parent_irq_domain()") Signed-off-by: Nam Cao Signed-off-by: Bjorn Helgaas Link: https://patch.msgid.link/20250811054144.4049448-1-namcao@linutronix.de

PCI: xilinx: Switch to msi_create_parent_irq_domain()

2025-07-24T21:24:16Z

Switch to msi_create_parent_irq_domain() from pci_msi_create_irq_domain() which was using legacy MSI domain setup. Signed-off-by: Nam Cao [mani: reworded commit message] Signed-off-by: Manivannan Sadhasivam [bhelgaas: rebase on dev_fwnode() conversion, drop fwnode local var] Signed-off-by: Bjorn Helgaas Reviewed-by: Thomas Gleixner Link: https://patch.msgid.link/b1353c797ce53714c22823de3bd2ae3d09fcd84f.1750858083.git.namcao@linutronix.de

PCI: Switch to irq_domain_create_linear()

2025-05-16T19:06:10Z

irq_domain_add_linear() is going away as being obsolete now. Switch to the preferred irq_domain_create_linear(). That differs in the first parameter: It takes more generic struct fwnode_handle instead of struct device_node. Therefore, of_fwnode_handle() is added around the parameter. Note some of the users can likely use dev->fwnode directly instead of indirect of_fwnode_handle(dev->of_node). But dev->fwnode is not guaranteed to be set for all, so this has to be investigated on case to case basis (by people who can actually test with the HW). [ tglx: Fix up subject prefix and convert the new instance in dwc/pcie-amd-mdb.c ] Signed-off-by: Jiri Slaby (SUSE) Signed-off-by: Thomas Gleixner Link: https://lore.kernel.org/all/20250319092951.37667-30-jirislaby@kernel.org

PCI: xilinx: Silence 'set affinity failed' warning

2024-08-06T17:52:17Z

Use MSI_FLAG_NO_AFFINITY, which keeps .irq_set_affinity() unset and allows migrate_one_irq() to exit right away, without warnings like this: IRQ...: set affinity failed(-22) Remove the .irq_set_affinity() implementation that is no longer needed. Link: https://lore.kernel.org/r/20240723132958.41320-16-marek.vasut+renesas@mailbox.org Signed-off-by: Marek Vasut [bhelgaas: commit log] Signed-off-by: Bjorn Helgaas Reviewed-by: Manivannan Sadhasivam Acked-by: Thomas Gleixner

PCI: xilinx: Rename xilinx_pcie_port to xilinx_pcie

2022-01-03T21:05:28Z

Rename struct xilinx_pcie_port to xilinx_pcie to match the convention of _pcie. No functional change intended. Link: https://lore.kernel.org/r/20211223011054.1227810-23-helgaas@kernel.org Signed-off-by: Fan Fei Signed-off-by: Bjorn Helgaas Acked-by: Michal Simek

PCI: Bulk conversion to generic_handle_domain_irq()

2021-08-02T16:53:05Z

Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Link: https://lore.kernel.org/r/20210802162630.2219813-4-maz@kernel.org Signed-off-by: Marc Zyngier Signed-off-by: Bjorn Helgaas Acked-by: Krzysztof Kozlowski

PCI: xilinx: Convert to MSI domains

2021-04-20T13:11:21Z

In anticipation of the removal of the msi_controller structure, convert the ancient xilinx host controller driver to MSI domains. We end-up with the usual two domain structure, the top one being a generic PCI/MSI domain, the bottom one being xilinx-specific and handling the actual HW interrupt allocation. This allows us to fix some of the most appaling MSI programming, where the message programmed in the device is the virtual IRQ number instead of the allocated vector number. The allocator is also made safe with a mutex. This should allow support for MultiMSI, but I decided not to even try, since I cannot test it. Link: https://lore.kernel.org/r/20210330151145.997953-6-maz@kernel.org Tested-by: Bharat Kumar Gogada Signed-off-by: Marc Zyngier Signed-off-by: Lorenzo Pieralisi Acked-by: Bjorn Helgaas

PCI: xilinx: Don't allocate extra memory for the MSI capture address

2021-04-20T13:11:21Z

A long cargo-culted behaviour of PCI drivers is to allocate memory to obtain an address that is fed to the controller as the MSI capture address (i.e. the MSI doorbell). But there is no actual requirement for this address to be RAM. All it needs to be is a suitable aligned address that will *not* be DMA'd to. Use the physical address of the 'port' data structure as the MSI capture address, aligned on a 4K boundary. Link: https://lore.kernel.org/r/20210330151145.997953-5-maz@kernel.org Tested-by: Bharat Kumar Gogada Signed-off-by: Marc Zyngier Signed-off-by: Lorenzo Pieralisi

PCI: Unify ECAM constants in native PCI Express drivers

2020-12-10T20:55:49Z

Add ECAM-related constants to provide a set of standard constants defining memory address shift values to the byte-level address that can be used to access the PCI Express Configuration Space, and then move native PCI Express controller drivers to use the newly introduced definitions retiring driver-specific ones. Refactor pci_ecam_map_bus() function to use newly added constants so that limits to the bus, device function and offset (now limited to 4K as per the specification) are in place to prevent the defective or malicious caller from supplying incorrect configuration offset and thus targeting the wrong device when accessing extended configuration space. This refactor also allows for the ".bus_shift" initialisers to be dropped when the user is not using a custom value as a default value will be used as per the PCI Express Specification. Thanks to Qian Cai , Michael Walle , and Vladimir Oltean for reporting a pci_ecam_create() issue with .bus_shift and to Vladimir for proposing the fix. [bhelgaas: incorporate Vladimir's fix, update commit log] Suggested-by: Bjorn Helgaas Link: https://lore.kernel.org/r/20201129230743.3006978-2-kw@linux.com Tested-by: Michael Walle Signed-off-by: Krzysztof Wilczyński Signed-off-by: Lorenzo Pieralisi Signed-off-by: Bjorn Helgaas Reviewed-by: Jon Derrick Reviewed-by: Bjorn Helgaas