<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/pci/controller/pcie-rcar.c, branch linux-rolling-stable</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-rolling-stable</id>
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<updated>2020-05-11T10:29:48Z</updated>
<entry>
<title>PCI: rcar: Fix calculating mask for PCIEPAMR register</title>
<updated>2020-05-11T10:29:48Z</updated>
<author>
<name>Lad Prabhakar</name>
<email>prabhakar.mahadev-lad.rj@bp.renesas.com</email>
</author>
<published>2020-05-07T12:33:14Z</published>
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<id>urn:sha1:328263687148bebf0d5daf5d06bcc2a46f3d7b0a</id>
<content type='text'>
The mask value was calculated incorrectly for PCIEPAMR register if the
size was less than 128 bytes. Fix this issue by adding a check on size.

Link: https://lore.kernel.org/r/1588854799-13710-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;
</content>
</entry>
<entry>
<title>PCI: rcar: Move shareable code to a common file</title>
<updated>2020-05-11T10:29:47Z</updated>
<author>
<name>Lad Prabhakar</name>
<email>prabhakar.mahadev-lad.rj@bp.renesas.com</email>
</author>
<published>2020-05-07T12:33:13Z</published>
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<id>urn:sha1:78a0d7f2f5a31357bce68012d886507b4cf33598</id>
<content type='text'>
Move shareable code to common file pcie-rcar.c and the #defines to
pcie-rcar.h so that the common code can be reused with endpoint driver.
There are no functional changes with this patch for the host controller
driver.

Link: https://lore.kernel.org/r/1588854799-13710-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;
</content>
</entry>
<entry>
<title>PCI: rcar: Rename pcie-rcar.c to pcie-rcar-host.c</title>
<updated>2020-05-11T10:29:47Z</updated>
<author>
<name>Lad Prabhakar</name>
<email>prabhakar.mahadev-lad.rj@bp.renesas.com</email>
</author>
<published>2020-05-07T12:33:12Z</published>
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<id>urn:sha1:a18f4b6ea50b81e28bd05381883a531ab345f753</id>
<content type='text'>
This commit renames pcie-rcar.c to pcie-rcar-host.c in preparation for
adding support for endpoint mode. CONFIG_PCIE_RCAR is kept so that arm64
defconfig change can be a separate patch.

With this patch both config options PCIE_RCAR and PCIE_RCAR_HOST will be
available but PCIE_RCAR internally selects PCIE_RCAR_HOST so that bisect
builds wont be affected.

Link: https://lore.kernel.org/r/1588854799-13710-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;
</content>
</entry>
<entry>
<title>PCI: rcar: Add suspend/resume</title>
<updated>2020-05-07T08:34:50Z</updated>
<author>
<name>Kazufumi Ikeda</name>
<email>kaz-ikeda@xc.jp.nec.com</email>
</author>
<published>2020-03-14T19:12:32Z</published>
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<id>urn:sha1:ce351636c67f75a9f282ab69283be231d2c8e845</id>
<content type='text'>
Add suspend/resume support for rcar. The resume handler reprograms the
hardware based on the software state kept in specific device structures,
so there is no need to save registers on suspend.

Link: https://lore.kernel.org/r/20200314191232.3122290-1-marek.vasut@gmail.com
Link: https://lore.kernel.org/r/20200426123148.56051-1-marek.vasut@gmail.com
Signed-off-by: Kazufumi Ikeda &lt;kaz-ikeda@xc.jp.nec.com&gt;
Signed-off-by: Gaku Inami &lt;gaku.inami.xw@bp.renesas.com&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Cc: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Cc: Phil Edworthy &lt;phil.edworthy@renesas.com&gt;
Cc: Simon Horman &lt;horms+renesas@verge.net.au&gt;
Cc: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: linux-renesas-soc@vger.kernel.org
</content>
</entry>
<entry>
<title>PCI: rcar: Fix incorrect programming of OB windows</title>
<updated>2020-05-07T08:34:37Z</updated>
<author>
<name>Andrew Murray</name>
<email>andrew.murray@arm.com</email>
</author>
<published>2019-10-04T13:29:41Z</published>
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<id>urn:sha1:2b9f217433e31d125fb697ca7974d3de3ecc3e92</id>
<content type='text'>
The outbound windows (PCIEPAUR(x), PCIEPALR(x)) describe a mapping between
a CPU address (which is determined by the window number 'x') and a
programmed PCI address - Thus allowing the controller to translate CPU
accesses into PCI accesses.

However the existing code incorrectly writes the CPU address - lets fix
this by writing the PCI address instead.

For memory transactions, existing DT users describe a 1:1 identity mapping
and thus this change should have no effect. However the same isn't true for
I/O.

Link: https://lore.kernel.org/r/20191004132941.6660-1-andrew.murray@arm.com
Fixes: c25da4778803 ("PCI: rcar: Add Renesas R-Car PCIe driver")
Tested-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Signed-off-by: Andrew Murray &lt;andrew.murray@arm.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'remotes/lorenzo/pci/mmio-dma-ranges'</title>
<updated>2019-11-28T14:54:53Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-11-28T14:54:53Z</published>
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<id>urn:sha1:7bd4c4a7b0ff94ef01247f905cd568fb67c747e0</id>
<content type='text'>
  - Consolidate DT "dma-ranges" parsing and convert all host drivers to use
    shared parsing (Rob Herring)

* remotes/lorenzo/pci/mmio-dma-ranges:
  PCI: Make devm_of_pci_get_host_bridge_resources() static
  PCI: rcar: Use inbound resources for setup
  PCI: iproc: Use inbound resources for setup
  PCI: xgene: Use inbound resources for setup
  PCI: v3-semi: Use inbound resources for setup
  PCI: ftpci100: Use inbound resources for setup
  PCI: of: Add inbound resource parsing to helpers
  PCI: versatile: Enable COMPILE_TEST
  PCI: versatile: Remove usage of PHYS_OFFSET
  PCI: versatile: Use pci_parse_request_of_pci_ranges()
  PCI: xilinx-nwl: Use pci_parse_request_of_pci_ranges()
  PCI: xilinx: Use pci_parse_request_of_pci_ranges()
  PCI: xgene: Use pci_parse_request_of_pci_ranges()
  PCI: v3-semi: Use pci_parse_request_of_pci_ranges()
  PCI: rockchip: Drop storing driver private outbound resource data
  PCI: rockchip: Use pci_parse_request_of_pci_ranges()
  PCI: mobiveil: Use pci_parse_request_of_pci_ranges()
  PCI: mediatek: Use pci_parse_request_of_pci_ranges()
  PCI: iproc: Use pci_parse_request_of_pci_ranges()
  PCI: faraday: Use pci_parse_request_of_pci_ranges()
  PCI: dwc: Use pci_parse_request_of_pci_ranges()
  PCI: altera: Use pci_parse_request_of_pci_ranges()
  PCI: aardvark: Use pci_parse_request_of_pci_ranges()
  PCI: Export pci_parse_request_of_pci_ranges()
  resource: Add a resource_list_first_type helper

# Conflicts:
#	drivers/pci/controller/pcie-rcar.c
</content>
</entry>
<entry>
<title>PCI: rcar: Use inbound resources for setup</title>
<updated>2019-11-20T17:00:14Z</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2019-10-28T16:32:55Z</published>
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<id>urn:sha1:085f793984adcbf3966176bac088c32e0b66235a</id>
<content type='text'>
Now that the helpers provide the inbound resources in the host bridge
'dma_ranges' resource list, convert Renesas R-Car PCIe host bridge to
use the resource list to setup the inbound addresses.

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Cc: Simon Horman &lt;horms@verge.net.au&gt;
Cc: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI: of: Add inbound resource parsing to helpers</title>
<updated>2019-11-20T16:59:58Z</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2019-10-30T22:30:57Z</published>
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<id>urn:sha1:331f63457165a30c708280de2c77f1742c6351dc</id>
<content type='text'>
Extend devm_of_pci_get_host_bridge_resources() and
pci_parse_request_of_pci_ranges() helpers to also parse the inbound
addresses from DT 'dma-ranges' and populate a resource list with the
translated addresses. This will help ensure 'dma-ranges' is always
parsed in a consistent way.

Tested-by: Srinath Mannam &lt;srinath.mannam@broadcom.com&gt;
Tested-by: Thomas Petazzoni &lt;thomas.petazzoni@bootlin.com&gt; # for AArdvark
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Srinath Mannam &lt;srinath.mannam@broadcom.com&gt;
Reviewed-by: Andrew Murray &lt;andrew.murray@arm.com&gt;
Acked-by: Gustavo Pimentel &lt;gustavo.pimentel@synopsys.com&gt;
Cc: Jingoo Han &lt;jingoohan1@gmail.com&gt;
Cc: Gustavo Pimentel &lt;gustavo.pimentel@synopsys.com&gt;
Cc: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Thomas Petazzoni &lt;thomas.petazzoni@bootlin.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: Toan Le &lt;toan@os.amperecomputing.com&gt;
Cc: Ley Foon Tan &lt;lftan@altera.com&gt;
Cc: Tom Joseph &lt;tjoseph@cadence.com&gt;
Cc: Ray Jui &lt;rjui@broadcom.com&gt;
Cc: Scott Branden &lt;sbranden@broadcom.com&gt;
Cc: bcm-kernel-feedback-list@broadcom.com
Cc: Ryder Lee &lt;ryder.lee@mediatek.com&gt;
Cc: Karthikeyan Mitran &lt;m.karthikeyan@mobiveil.co.in&gt;
Cc: Hou Zhiqiang &lt;Zhiqiang.Hou@nxp.com&gt;
Cc: Simon Horman &lt;horms@verge.net.au&gt;
Cc: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
Cc: Heiko Stuebner &lt;heiko@sntech.de&gt;
Cc: Michal Simek &lt;michal.simek@xilinx.com&gt;
Cc: rfi@lists.rocketboards.org
Cc: linux-mediatek@lists.infradead.org
Cc: linux-renesas-soc@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
</content>
</entry>
<entry>
<title>PCI: rcar: Fix missing MACCTLR register setting in initialization sequence</title>
<updated>2019-11-12T11:02:27Z</updated>
<author>
<name>Yoshihiro Shimoda</name>
<email>yoshihiro.shimoda.uh@renesas.com</email>
</author>
<published>2019-11-05T10:51:29Z</published>
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<id>urn:sha1:7c7e53e1c93df14690bd12c1f84730fef927a6f1</id>
<content type='text'>
The R-Car Gen2/3 manual - available at:

https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rzg/rzg1m.html#documents

"RZ/G Series User's Manual: Hardware" section

strictly enforces the MACCTLR inizialization value - 39.3.1 - "Initial
Setting of PCI Express":

"Be sure to write the initial value (= H'80FF 0000) to MACCTLR before
enabling PCIETCTLR.CFINIT".

To avoid unexpected behavior and to match the SW initialization sequence
guidelines, this patch programs the MACCTLR with the correct value.

Note that the MACCTLR.SPCHG bit in the MACCTLR register description
reports that "Only writing 1 is valid and writing 0 is invalid" but this
"invalid" has to be interpreted as a write-ignore aka "ignored", not
"prohibited".

Reported-by: Eugeniu Rosca &lt;erosca@de.adit-jv.com&gt;
Fixes: c25da4778803 ("PCI: rcar: Add Renesas R-Car PCIe driver")
Fixes: be20bbcb0a8c ("PCI: rcar: Add the initialization of PCIe link in resume_noirq()")
Signed-off-by: Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Cc: &lt;stable@vger.kernel.org&gt; # v5.2+
</content>
</entry>
<entry>
<title>PCI: rcar: Recalculate inbound range alignment for each controller entry</title>
<updated>2019-11-11T14:29:20Z</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@gmail.com</email>
</author>
<published>2019-10-26T18:26:59Z</published>
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<id>urn:sha1:767c7846419cc562c9dd4f14cc617c2b9b1b96cd</id>
<content type='text'>
Due to hardware constraints, the size of each inbound range entry
populated into the controller cannot be larger than the alignment
of the entry's start address. Currently, the alignment for each
"dma-ranges" inbound range is calculated only once for each range
and the increment for programming the controller is also derived
from it only once. Thus, a "dma-ranges" entry describing a memory
at 0x48000000 and size 0x38000000 would lead to multiple controller
entries, each 0x08000000 long.

This is inefficient, especially considering that by adding the size
to the start address, the alignment increases. This patch moves the
alignment calculation into the loop populating the controller entries,
thus updating the alignment for each controller entry.

Tested-by: Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Andrew Murray &lt;andrew.murray@arm.com&gt;
Reviewed-by: Simon Horman &lt;horms+renesas@verge.net.au&gt;
Reviewed-by: Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;
Cc: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Cc: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Cc: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: linux-renesas-soc@vger.kernel.org
</content>
</entry>
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