<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/pci/controller/dwc/pcie-qcom-ep.c, branch linux-6.18.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.18.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.18.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2025-10-03T17:13:20Z</updated>
<entry>
<title>Merge branch 'pci/controller/qcom'</title>
<updated>2025-10-03T17:13:20Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2025-10-03T17:13:20Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=531abff0fa53bc3a2f7f69b2693386eb6bda96e5'/>
<id>urn:sha1:531abff0fa53bc3a2f7f69b2693386eb6bda96e5</id>
<content type='text'>
- Select PCI Power Control Slot driver so slot voltage rails can be turned
  on/off if described in Root Port device tree node (Qiang Yu)

- Parse only PCI bridge child nodes in device tree, skipping unrelated
  nodes such as OPP (Operating Performance Points), which caused probe
  failures (Krishna Chaitanya Chundru)

- Add 8.0 GT/s and 32.0 GT/s equalization settings (Ziyue Zhang)

- Fix typo in CURSOR macro names (Ziyue Zhang)

- Consolidate Root Port 'phy' and 'reset' properties in struct
  qcom_pcie_port, regardless of whether we got them from the Root Port node
  or the host bridge node (Manivannan Sadhasivam)

- Fetch and map the ELBI register space in the DWC core rather than in each
  driver individually (Krishna Chaitanya Chundru)

- Enable ECAM mechanism in DWC core by setting up iATU with 'CFG Shift
  Feature' and use this in the qcom driver (Krishna Chaitanya Chundru)

* pci/controller/qcom:
  PCI: dwc: Support ECAM mechanism by enabling iATU 'CFG Shift Feature'
  PCI: qcom: Prepare for the DWC ECAM enablement
  PCI: dwc: Prepare the driver for enabling ECAM mechanism using iATU 'CFG Shift Feature'
  PCI: dwc: Add support for ELBI resource mapping
  PCI: qcom: Move host bridge 'phy' and 'reset' pointers to struct qcom_pcie_port
  PCI: qcom: Fix macro typo for CURSOR
  PCI: qcom: Add equalization settings for 8.0 GT/s and 32.0 GT/s
  PCI: qcom: Restrict port parsing only to PCIe bridge child nodes
  PCI: qcom: Select PCI Power Control Slot driver
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/dwc-edma'</title>
<updated>2025-10-03T17:13:16Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2025-10-03T17:13:16Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=0a09e23176beb46879007257b678b6a59905109f'/>
<id>urn:sha1:0a09e23176beb46879007257b678b6a59905109f</id>
<content type='text'>
- Verify that if DT specifies a single IRQ for all eDMA channels, it is
  named 'dma' (Niklas Cassel)

- Remove qcom edma.nr_irqs initialization, which is redundant since
  dw_pcie_edma_irq_verify() initializes it based on whether the DT contains
  'dma' (single IRQ) or 'dmaX' (multiple IRQs) (Niklas Cassel)

* pci/controller/dwc-edma:
  PCI: qcom-ep: Remove redundant edma.nr_irqs initialization
  PCI: dwc: Verify the single eDMA IRQ in dw_pcie_edma_irq_verify()
</content>
</entry>
<entry>
<title>PCI: dwc: Add support for ELBI resource mapping</title>
<updated>2025-09-25T13:03:37Z</updated>
<author>
<name>Krishna Chaitanya Chundru</name>
<email>krishna.chundru@oss.qualcomm.com</email>
</author>
<published>2025-09-23T11:26:51Z</published>
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<id>urn:sha1:c96992a24beca0768c1c42ad25d6a466e17ec70f</id>
<content type='text'>
External Local Bus Interface (ELBI) is an optional register space for all
DWC IPs containing the vendor specific registers. There is no need for the
vendor glue drivers to fetch and map the ELBI region separately.

Hence, optionally fetch and map the resource from DT in the DWC core. This
also warrants dropping the corresponding code from glue drivers. Hence,
drop the ELBI resource fetch and map logic from glue drivers and convert
them to use 'dw_pci::elbi_base'.

Note that the pcie-qcom-ep driver used devm_pci_remap_cfg_resource() to map
the ELBI resource previously. But it was a mistake since
devm_pci_remap_cfg_resource() should only be used for mapping the PCIe
config space region as it maps the region as Non-Posted. As ELBI is used to
hold vendor specific registers, there is no need to map the region as
Non-Posted. With this conversion, the region will get mapped as normal MMIO
memory.

Suggested-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Krishna Chaitanya Chundru &lt;krishna.chundru@oss.qualcomm.com&gt;
[mani: removed elbi override, converted glue drivers and reworded description]
Signed-off-by: Manivannan Sadhasivam &lt;mani@kernel.org&gt;
Link: https://patch.msgid.link/20250923-controller-dwc-ecam-v10-1-e84390ba75fa@kernel.org
</content>
</entry>
<entry>
<title>PCI: qcom-ep: Remove redundant edma.nr_irqs initialization</title>
<updated>2025-09-12T21:54:14Z</updated>
<author>
<name>Niklas Cassel</name>
<email>cassel@kernel.org</email>
</author>
<published>2025-09-08T16:59:16Z</published>
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<id>urn:sha1:eea30c76012245efa87f427ca6d110d1674e433a</id>
<content type='text'>
dw_pcie_edma_irq_verify() already parses device tree for either "dma" (if
there is a single IRQ for all DMA channels) or "dmaX" (if there is one IRQ
per DMA channel), and initializes dma.nr_irqs accordingly.

Additionally, the probing of the eDMA driver will fail if neither "dma"
nor "dmaX" is defined in the device tree.

Therefore there is no need for a glue driver to specify edma.nr_irqs, so
remove the redundant edma.nr_irqs initialization.

Signed-off-by: Niklas Cassel &lt;cassel@kernel.org&gt;
Signed-off-by: Manivannan Sadhasivam &lt;mani@kernel.org&gt;
[bhelgaas: fix typos]
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Link: https://patch.msgid.link/20250908165914.547002-4-cassel@kernel.org
</content>
</entry>
<entry>
<title>PCI: qcom: Add equalization settings for 8.0 GT/s and 32.0 GT/s</title>
<updated>2025-09-04T16:54:04Z</updated>
<author>
<name>Ziyue Zhang</name>
<email>ziyue.zhang@oss.qualcomm.com</email>
</author>
<published>2025-09-04T06:52:23Z</published>
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<id>urn:sha1:37bf0f4e39de9b53bc6f8d3702b021e2c6b5bae3</id>
<content type='text'>
Add lane equalization setting for 8.0 GT/s and 32.0 GT/s to enhance link
stability and avoid AER Correctable Errors reported on some platforms
(eg. SA8775P).

8.0 GT/s, 16.0 GT/s and 32.0 GT/s require the same equalization setting.
This setting is programmed into a group of shadow registers, which can be
switched to configure equalization for different speeds by writing 00b,
01b and 10b to `RATE_SHADOW_SEL`.

Hence, program equalization registers in a loop using link speed as index,
so that equalization setting can be programmed for 8.0 GT/s, 16.0 GT/s
and 32.0 GT/s.

Fixes: 489f14be0e0a ("arm64: dts: qcom: sa8775p: Add pcie0 and pcie1 nodes")
Co-developed-by: Qiang Yu &lt;qiang.yu@oss.qualcomm.com&gt;
Signed-off-by: Qiang Yu &lt;qiang.yu@oss.qualcomm.com&gt;
Signed-off-by: Ziyue Zhang &lt;ziyue.zhang@oss.qualcomm.com&gt;
[mani: wrapped the warning to fit 100 columns, used post-increment for loop]
Signed-off-by: Manivannan Sadhasivam &lt;mani@kernel.org&gt;
Link: https://patch.msgid.link/20250904065225.1762793-2-ziyue.zhang@oss.qualcomm.com
</content>
</entry>
<entry>
<title>PCI: endpoint: Drop superfluous pci_epc_features initialization</title>
<updated>2025-08-14T15:42:42Z</updated>
<author>
<name>Niklas Cassel</name>
<email>cassel@kernel.org</email>
</author>
<published>2025-08-14T15:21:20Z</published>
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<id>urn:sha1:27fce9e8c6f031b526bf471e1076abca31473464</id>
<content type='text'>
struct pci_epc_features has static storage duration, so all struct members
are zero initialized implicitly. Thus, remove explicit zero initialization
for features that are *not* supported so we don't have to touch existing
drivers as new features are added.

Signed-off-by: Niklas Cassel &lt;cassel@kernel.org&gt;
[bhelgaas: squash together, expand commit log rationale]
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt; #rcar-ep, rcar-gen4
Link: https://patch.msgid.link/20250814152119.1562063-16-cassel@kernel.org
Link: https://patch.msgid.link/20250814152119.1562063-17-cassel@kernel.org
Link: https://patch.msgid.link/20250814152119.1562063-18-cassel@kernel.org
Link: https://patch.msgid.link/20250814152119.1562063-19-cassel@kernel.org
Link: https://patch.msgid.link/20250814152119.1562063-20-cassel@kernel.org
Link: https://patch.msgid.link/20250814152119.1562063-21-cassel@kernel.org
Link: https://patch.msgid.link/20250814152119.1562063-22-cassel@kernel.org
Link: https://patch.msgid.link/20250814152119.1562063-23-cassel@kernel.org
Link: https://patch.msgid.link/20250814152119.1562063-24-cassel@kernel.org
Link: https://patch.msgid.link/20250814152119.1562063-25-cassel@kernel.org
Link: https://patch.msgid.link/20250814152119.1562063-26-cassel@kernel.org
Link: https://patch.msgid.link/20250814152119.1562063-27-cassel@kernel.org
Link: https://patch.msgid.link/20250814152119.1562063-28-cassel@kernel.org
</content>
</entry>
<entry>
<title>Merge branch 'pci/ptm-debugfs'</title>
<updated>2025-06-04T15:50:44Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2025-06-04T15:50:44Z</published>
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<id>urn:sha1:db847adbf99f80088b5e545855c1bc7ea52973d1</id>
<content type='text'>
- Add debugfs support for exposing DWC device-specific PTM context
  (Manivannan Sadhasivam)

* pci/ptm-debugfs:
  PCI: qcom-ep: Mask PTM_UPDATING interrupt
  PCI: dwc: Add debugfs support for PTM context
  PCI: dwc: Pass DWC PCIe mode to dwc_pcie_debugfs_init()
  PCI: Add debugfs support for exposing PTM context
</content>
</entry>
<entry>
<title>PCI: qcom-ep: Mask PTM_UPDATING interrupt</title>
<updated>2025-05-15T09:16:33Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2025-05-05T14:24:42Z</published>
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<id>urn:sha1:5fbfae69e78d242c5efb2a4b62eeea883af145ee</id>
<content type='text'>
When PTM is enabled, PTM_UPDATING interrupt will be fired for each PTM
context update, which will be once every 10ms in the case of auto context
update. Since the interrupt is not strictly needed for making use of PTM,
mask it to avoid the overhead of processing it.

Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Krzysztof Wilczyński &lt;kwilczynski@kernel.org&gt;
Link: https://patch.msgid.link/20250505-pcie-ptm-v4-4-02d26d51400b@linaro.org
</content>
</entry>
<entry>
<title>PCI: dwc: Return bool from link up check</title>
<updated>2025-05-13T09:12:59Z</updated>
<author>
<name>Hans Zhang</name>
<email>18255117159@163.com</email>
</author>
<published>2025-05-10T16:07:08Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=f46bfb1d3c6a601caad90eb3c11a1e1e17cccb1a'/>
<id>urn:sha1:f46bfb1d3c6a601caad90eb3c11a1e1e17cccb1a</id>
<content type='text'>
PCIe link status check is supposed to return a boolean to indicate whether
the link is up or not. So, modify the link_up callbacks and
dw_pcie_link_up() function to return bool instead of int.

Signed-off-by: Hans Zhang &lt;18255117159@163.com&gt;
[mani: commit message reword]
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Reviewed-by: Niklas Cassel &lt;cassel@kernel.org&gt;
Link: https://patch.msgid.link/20250510160710.392122-2-18255117159@163.com
</content>
</entry>
<entry>
<title>Merge branch 'pci/misc'</title>
<updated>2025-03-27T18:15:05Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2025-03-27T18:15:05Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=dea140198b846f7432d78566b7b0b83979c72c2b'/>
<id>urn:sha1:dea140198b846f7432d78566b7b0b83979c72c2b</id>
<content type='text'>
- Remove unused tools 'pci' build target left over after moving tests to
  tools/testing/selftests/pci_endpoint (Jianfeng Liu)

- Fix typos and whitespace errors (Bjorn Helgaas)

* pci/misc:
  PCI: Fix typos
  tools/Makefile: Remove pci target

# Conflicts:
#	drivers/pci/endpoint/functions/pci-epf-test.c
</content>
</entry>
</feed>
