<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/pci/controller/cadence/Kconfig, branch linux-6.9.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.9.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.9.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2024-01-06T04:51:51Z</updated>
<entry>
<title>PCI: j721e: Make TI J721E depend on ARCH_K3</title>
<updated>2024-01-06T04:51:51Z</updated>
<author>
<name>Peter Robinson</name>
<email>pbrobinson@gmail.com</email>
</author>
<published>2024-01-04T21:39:06Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=177c9ac6ab3fa585608a16877b1fa1aad832571c'/>
<id>urn:sha1:177c9ac6ab3fa585608a16877b1fa1aad832571c</id>
<content type='text'>
The J721E PCIe is hardware specific to TI SoC parts so add a dependency
on that so it's available for those SoC parts and for compile testing but
not necessarily everyone who enables the Cadence PCIe controller.

Link: https://lore.kernel.org/linux-pci/20240104213910.1426843-1-pbrobinson@gmail.com
Signed-off-by: Peter Robinson &lt;pbrobinson@gmail.com&gt;
Signed-off-by: Krzysztof Wilczyński &lt;kwilczynski@kernel.org&gt;
</content>
</entry>
<entry>
<title>PCI: Use consistent controller Kconfig menu entry language</title>
<updated>2023-04-20T21:18:04Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2023-04-18T17:43:33Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=80c170d7b13d0a46a46f869774baf3c02d775654'/>
<id>urn:sha1:80c170d7b13d0a46a46f869774baf3c02d775654</id>
<content type='text'>
Use "PCIe controller" consistently instead of "host bridge", "bus driver",
etc.  Annotate with "(host mode)" or "(endpoint mode)" as needed.

Link: https://lore.kernel.org/r/20230418174336.145585-5-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI: j721e: Add TI J721E PCIe driver</title>
<updated>2020-08-03T13:49:55Z</updated>
<author>
<name>Kishon Vijay Abraham I</name>
<email>kishon@ti.com</email>
</author>
<published>2020-07-22T11:03:15Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=f3e25911a430ed16ec209929183df762fe9c785b'/>
<id>urn:sha1:f3e25911a430ed16ec209929183df762fe9c785b</id>
<content type='text'>
Add support for PCIe controller in J721E SoC. The controller uses the
Cadence PCIe core programmed by pcie-cadence*.c. The PCIe controller
will work in both host mode and device mode.
Some of the features of the controller are:
  *) Supports both RC mode and EP mode
  *) Supports MSI and MSI-X support
  *) Supports upto GEN3 speed mode
  *) Supports SR-IOV capability
  *) Ability to route all transactions via SMMU (support will be added
     in a later patch).

Link: https://lore.kernel.org/r/20200722110317.4744-14-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
</content>
</entry>
<entry>
<title>PCI: cadence: Move all files to per-device cadence directory</title>
<updated>2019-11-11T14:57:02Z</updated>
<author>
<name>Tom Joseph</name>
<email>tjoseph@cadence.com</email>
</author>
<published>2019-11-11T12:30:44Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=de80f95ccb9c4de5a0fae0334de5ab438acf3453'/>
<id>urn:sha1:de80f95ccb9c4de5a0fae0334de5ab438acf3453</id>
<content type='text'>
Cadence core library files may be used by various platform drivers.
Add a new directory "cadence" to group all the Cadence core library files
and the platforms using Cadence core library.

Signed-off-by: Tom Joseph &lt;tjoseph@cadence.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Andrew Murray &lt;andrew.murray@arm.com&gt;
</content>
</entry>
</feed>
