<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/ntb/hw/amd, branch linux-6.9.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.9.y</id>
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<updated>2023-08-18T13:50:06Z</updated>
<entry>
<title>ntb: amd: Drop unnecessary error check for debugfs_create_dir</title>
<updated>2023-08-18T13:50:06Z</updated>
<author>
<name>Ruan Jinjie</name>
<email>ruanjinjie@huawei.com</email>
</author>
<published>2023-08-17T06:32:19Z</published>
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<id>urn:sha1:28e70ed9d0fab935f78b565d9c026585559b86a4</id>
<content type='text'>
This patch removes the error checking for debugfs_create_dir in
ntb_hw_amd.c. This is because the DebugFS kernel API is developed
in a way that the caller can safely ignore the errors that
occur during the creation of DebugFS nodes. The debugfs APIs have
a IS_ERR() judge in start_creating() which can handle it
gracefully. so these checks are unnecessary.

Signed-off-by: Ruan Jinjie &lt;ruanjinjie@huawei.com&gt;
Acked-by: Sanjay R Mehta &lt;sanju.mehta@amd.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</content>
</entry>
<entry>
<title>ntb: hw: amd: Fix debugfs_create_dir error checking</title>
<updated>2023-07-08T17:55:44Z</updated>
<author>
<name>Anup Sharma</name>
<email>anupnewsmail@gmail.com</email>
</author>
<published>2023-05-12T20:24:34Z</published>
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<id>urn:sha1:bff6efc54bd0e27a332eb733525d7f698fd4a5b7</id>
<content type='text'>
The debugfs_create_dir function returns ERR_PTR in case of error, and the
only correct way to check if an error occurred is 'IS_ERR' inline function.
This patch will replace the null-comparison with IS_ERR.

Signed-off-by: Anup Sharma &lt;anupnewsmail@gmail.com&gt;
Suggested-by: Ivan Orlov &lt;ivan.orlov0322@gmail.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</content>
</entry>
<entry>
<title>ntb_hw_amd: Remove redundant pci_clear_master</title>
<updated>2023-07-08T15:02:37Z</updated>
<author>
<name>Cai Huoqing</name>
<email>cai.huoqing@linux.dev</email>
</author>
<published>2023-03-24T01:32:18Z</published>
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<id>urn:sha1:da6b4dc49e3c10e13adfb79fc41c098bacf1dc09</id>
<content type='text'>
Remove pci_clear_master to simplify the code,
the bus-mastering is also cleared in do_pci_disable_device,
like this:
./drivers/pci/pci.c:2197
static void do_pci_disable_device(struct pci_dev *dev)
{
	u16 pci_command;

	pci_read_config_word(dev, PCI_COMMAND, &amp;pci_command);
	if (pci_command &amp; PCI_COMMAND_MASTER) {
		pci_command &amp;= ~PCI_COMMAND_MASTER;
		pci_write_config_word(dev, PCI_COMMAND, pci_command);
	}

	pcibios_disable_device(dev);
}.
And dev-&gt;is_busmaster is set to 0 in pci_disable_device.

Signed-off-by: Cai Huoqing &lt;cai.huoqing@linux.dev&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</content>
</entry>
<entry>
<title>NTB: amd: Fix error handling in amd_ntb_pci_driver_init()</title>
<updated>2023-07-08T14:51:55Z</updated>
<author>
<name>Yuan Can</name>
<email>yuancan@huawei.com</email>
</author>
<published>2022-11-05T09:43:09Z</published>
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<id>urn:sha1:98af0a33c1101c29b3ce4f0cf4715fd927c717f9</id>
<content type='text'>
A problem about ntb_hw_amd create debugfs failed is triggered with the
following log given:

 [  618.431232] AMD(R) PCI-E Non-Transparent Bridge Driver 1.0
 [  618.433284] debugfs: Directory 'ntb_hw_amd' with parent '/' already present!

The reason is that amd_ntb_pci_driver_init() returns pci_register_driver()
directly without checking its return value, if pci_register_driver()
failed, it returns without destroy the newly created debugfs, resulting
the debugfs of ntb_hw_amd can never be created later.

 amd_ntb_pci_driver_init()
   debugfs_create_dir() # create debugfs directory
   pci_register_driver()
     driver_register()
       bus_add_driver()
         priv = kzalloc(...) # OOM happened
   # return without destroy debugfs directory

Fix by removing debugfs when pci_register_driver() returns error.

Fixes: a1b3695820aa ("NTB: Add support for AMD PCI-Express Non-Transparent Bridge")
Signed-off-by: Yuan Can &lt;yuancan@huawei.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</content>
</entry>
<entry>
<title>ntb_hw_amd: Add NTB PCI ID for new gen CPU</title>
<updated>2022-01-11T20:38:59Z</updated>
<author>
<name>Sanjay R Mehta</name>
<email>sanju.mehta@amd.com</email>
</author>
<published>2021-12-17T09:56:20Z</published>
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<id>urn:sha1:0d5924ec4b89613910366c890305e46821a31f01</id>
<content type='text'>
Add NTB support for new generation of processor

Signed-off-by: Sanjay R Mehta &lt;sanju.mehta@amd.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</content>
</entry>
<entry>
<title>NTB: switch from 'pci_' to 'dma_' API</title>
<updated>2021-09-05T22:08:14Z</updated>
<author>
<name>Christophe JAILLET</name>
<email>christophe.jaillet@wanadoo.fr</email>
</author>
<published>2021-08-22T14:04:12Z</published>
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<id>urn:sha1:38de3afffb7257176978dfa9b3ab67d0c29af95c</id>
<content type='text'>
The wrappers in include/linux/pci-dma-compat.h should go away.

The patch has been generated with the coccinelle script below.

It has been compile tested.

@@
@@
-    PCI_DMA_BIDIRECTIONAL
+    DMA_BIDIRECTIONAL

@@
@@
-    PCI_DMA_TODEVICE
+    DMA_TO_DEVICE

@@
@@
-    PCI_DMA_FROMDEVICE
+    DMA_FROM_DEVICE

@@
@@
-    PCI_DMA_NONE
+    DMA_NONE

@@
expression e1, e2, e3;
@@
-    pci_alloc_consistent(e1, e2, e3)
+    dma_alloc_coherent(&amp;e1-&gt;dev, e2, e3, GFP_)

@@
expression e1, e2, e3;
@@
-    pci_zalloc_consistent(e1, e2, e3)
+    dma_alloc_coherent(&amp;e1-&gt;dev, e2, e3, GFP_)

@@
expression e1, e2, e3, e4;
@@
-    pci_free_consistent(e1, e2, e3, e4)
+    dma_free_coherent(&amp;e1-&gt;dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_map_single(e1, e2, e3, e4)
+    dma_map_single(&amp;e1-&gt;dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_single(e1, e2, e3, e4)
+    dma_unmap_single(&amp;e1-&gt;dev, e2, e3, e4)

@@
expression e1, e2, e3, e4, e5;
@@
-    pci_map_page(e1, e2, e3, e4, e5)
+    dma_map_page(&amp;e1-&gt;dev, e2, e3, e4, e5)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_page(e1, e2, e3, e4)
+    dma_unmap_page(&amp;e1-&gt;dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_map_sg(e1, e2, e3, e4)
+    dma_map_sg(&amp;e1-&gt;dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_sg(e1, e2, e3, e4)
+    dma_unmap_sg(&amp;e1-&gt;dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
+    dma_sync_single_for_cpu(&amp;e1-&gt;dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_single_for_device(e1, e2, e3, e4)
+    dma_sync_single_for_device(&amp;e1-&gt;dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
+    dma_sync_sg_for_cpu(&amp;e1-&gt;dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_sg_for_device(e1, e2, e3, e4)
+    dma_sync_sg_for_device(&amp;e1-&gt;dev, e2, e3, e4)

@@
expression e1, e2;
@@
-    pci_dma_mapping_error(e1, e2)
+    dma_mapping_error(&amp;e1-&gt;dev, e2)

@@
expression e1, e2;
@@
-    pci_set_dma_mask(e1, e2)
+    dma_set_mask(&amp;e1-&gt;dev, e2)

@@
expression e1, e2;
@@
-    pci_set_consistent_dma_mask(e1, e2)
+    dma_set_coherent_mask(&amp;e1-&gt;dev, e2)

Signed-off-by: Christophe JAILLET &lt;christophe.jaillet@wanadoo.fr&gt;
Acked-by: Serge Semin &lt;fancer.lancer@gmail.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</content>
</entry>
<entry>
<title>NTB: hw: amd: fix an issue about leak system resources</title>
<updated>2020-08-24T02:36:32Z</updated>
<author>
<name>Kaige Li</name>
<email>likaige@loongson.cn</email>
</author>
<published>2020-08-11T01:59:57Z</published>
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<id>urn:sha1:44a0a3c17919db1498cebb02ecf3cf4abc1ade7b</id>
<content type='text'>
The related system resources were not released when pci_set_dma_mask(),
pci_set_consistent_dma_mask(), or pci_iomap() return error in the
amd_ntb_init_pci() function. Add pci_release_regions() to fix it.

Fixes: a1b3695820aa ("NTB: Add support for AMD PCI-Express Non-Transparent Bridge")
Signed-off-by: Kaige Li &lt;likaige@loongson.cn&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</content>
</entry>
<entry>
<title>ntb: hw: remove the code that sets the DMA mask</title>
<updated>2020-06-06T00:02:08Z</updated>
<author>
<name>Logan Gunthorpe</name>
<email>logang@deltatee.com</email>
</author>
<published>2020-05-06T04:21:48Z</published>
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<id>urn:sha1:f80fe8944e085a1065f4829a14af8394cad1c30f</id>
<content type='text'>
This patch removes the code that sets the DMA mask as it no longer
makes sense to do this.

Fixes: 7f46c8b3a552 ("NTB: ntb_tool: Add full multi-port NTB API support")
Signed-off-by: Logan Gunthorpe &lt;logang@deltatee.com&gt;
Tested-by: Alexander Fomichev &lt;fomichev.ru@gmail.com&gt;
Signed-off-by: Sanjay R Mehta &lt;sanju.mehta@amd.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</content>
</entry>
<entry>
<title>NTB: add pci shutdown handler for AMD NTB</title>
<updated>2020-03-13T14:04:20Z</updated>
<author>
<name>Arindam Nath</name>
<email>arindam.nath@amd.com</email>
</author>
<published>2020-02-05T15:54:32Z</published>
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<id>urn:sha1:b350f0a3eb264962caefeb892af56c1b727ee03f</id>
<content type='text'>
The PCI shutdown handler is invoked in response
to system reboot or shutdown. A data transfer
might still be in flight when this happens. So
the very first action we take here is to send
a link down notification, so that any pending
data transfer is terminated. Rest of the actions
are same as that of PCI remove handler.

Signed-off-by: Arindam Nath &lt;arindam.nath@amd.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</content>
</entry>
<entry>
<title>NTB: send DB event when driver is loaded or un-loaded</title>
<updated>2020-03-13T14:04:20Z</updated>
<author>
<name>Arindam Nath</name>
<email>arindam.nath@amd.com</email>
</author>
<published>2020-02-05T15:54:31Z</published>
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<id>urn:sha1:ac10d4f6c2a8247de21655f4564b0e209c3c1dd4</id>
<content type='text'>
When the driver on the local side is loaded, it sets
SIDE_READY bit in SIDE_INFO register. Likewise, when
it is un-loaded, it clears the bit.

Also just after being loaded, the driver polls for
peer SIDE_READY bit to be set. Since that bit is set
when the peer side driver has loaded, the polling on
local side breaks as soon as this condition is met.

But the situation is different when the driver is
un-loaded. Since the polling has already been stopped
as mentioned before, if the peer side driver gets
un-loaded, the driver on the local side is not notified
implicitly.

So, we improvise using existing doorbell mechanism.
We reserve the highest order bit of the DB register to
send a notification to peer when the driver on local
side is un-loaded. This also means that now we are one
short of 16 DB events and that is taken care of in the
valid DB mask.

Signed-off-by: Arindam Nath &lt;arindam.nath@amd.com&gt;
Signed-off-by: Jon Mason &lt;jdmason@kudzu.us&gt;
</content>
</entry>
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