<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/net/wireless/ath/ath11k/dp.c, branch linux-6.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2022-09-16T09:19:14Z</updated>
<entry>
<title>wifi: ath11k: Fix miscellaneous spelling errors</title>
<updated>2022-09-16T09:19:14Z</updated>
<author>
<name>Jeff Johnson</name>
<email>quic_jjohnson@quicinc.com</email>
</author>
<published>2022-09-09T14:55:35Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=3fecca0e7de885c71cf28065015832b78023aa6f'/>
<id>urn:sha1:3fecca0e7de885c71cf28065015832b78023aa6f</id>
<content type='text'>
Fix misspellings flagged by 'codespell'.

Signed-off-by: Jeff Johnson &lt;quic_jjohnson@quicinc.com&gt;
Signed-off-by: Kalle Valo &lt;quic_kvalo@quicinc.com&gt;
Link: https://lore.kernel.org/r/20220909145535.20437-1-quic_jjohnson@quicinc.com
</content>
</entry>
<entry>
<title>wifi: ath11k: Increase TCL data ring size for WCN6750</title>
<updated>2022-09-10T06:27:54Z</updated>
<author>
<name>Manikanta Pubbisetty</name>
<email>quic_mpubbise@quicinc.com</email>
</author>
<published>2022-09-07T08:36:56Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=97c9e37c7a7d7845b09035569da9b0eea196b1e1'/>
<id>urn:sha1:97c9e37c7a7d7845b09035569da9b0eea196b1e1</id>
<content type='text'>
Increase TCL data ring size to 2048 for WCN6750. This is
needed to meet 160 MHz TX throughput.

Add a new hw_param to indicate the TX ring size for
individual devices.

Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1

Signed-off-by: Manikanta Pubbisetty &lt;quic_mpubbise@quicinc.com&gt;
Signed-off-by: Kalle Valo &lt;quic_kvalo@quicinc.com&gt;
Link: https://lore.kernel.org/r/20220905071805.31625-4-quic_mpubbise@quicinc.com
</content>
</entry>
<entry>
<title>wifi: ath11k: Add multi TX ring support for WCN6750</title>
<updated>2022-09-10T06:27:54Z</updated>
<author>
<name>Manikanta Pubbisetty</name>
<email>quic_mpubbise@quicinc.com</email>
</author>
<published>2022-09-07T08:36:49Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=7636c9a6e7d7996ca0b7f31f61f0e55ef5ff89d5'/>
<id>urn:sha1:7636c9a6e7d7996ca0b7f31f61f0e55ef5ff89d5</id>
<content type='text'>
Currently in the case of WCN6750, only one TCL ring is used for TX,
this is limiting the TX throughput in 160 MHz case, enabling multiple
TCL rings on WCN6750 has shown an improvement of nearly 300 Mbps in
the case of TCP TX, therefore add the support of multi TX ring for
WCN6750.

Currently TCL ring is selected based on CPU ID, this logic cannot be
applied for WCN6750 as there is chance of out of order TX of packets
and to avoid this, choose TCL ring based on flow hash so that packets
of the same flow will end up on same TCL ring. For the same reason,
TCL ring retry logic is also not applicable for WCN6750.

Also the mapping of TCL, WBM &amp; RBM IDs for WCN6750 is different from
existing devices. Create a new TCM/WBM/RBM mapping for WCN6750.

Change does not impact existing ath11k devices.

Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1

Signed-off-by: Manikanta Pubbisetty &lt;quic_mpubbise@quicinc.com&gt;
Signed-off-by: Kalle Valo &lt;quic_kvalo@quicinc.com&gt;
Link: https://lore.kernel.org/r/20220905071805.31625-3-quic_mpubbise@quicinc.com
</content>
</entry>
<entry>
<title>ath11k: Process full monitor mode rx support</title>
<updated>2021-12-09T08:10:33Z</updated>
<author>
<name>Anilkumar Kolli</name>
<email>akolli@codeaurora.org</email>
</author>
<published>2021-12-08T08:44:00Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=7e2ea2e947046834a450295dfd328adb70a9f864'/>
<id>urn:sha1:7e2ea2e947046834a450295dfd328adb70a9f864</id>
<content type='text'>
In full monitor mode, monitor destination ring is read before monitor
status ring. mon_dst_ring has ppdu id, reap till the end of PPDU. Add
all the MPDUs to list. Start processing the status ring, if PPDU id in
status ring is lagging behind, reap the status ring, once the PPDU ID
matches, deliver the MSDU to upper layer. If status PPDU id leading,
reap the mon_dst_ring.

The advantage with full monitor mode is hardware has status buffers
available for all the MPDUs in mon_dst_ring, which makes it possible
to deliver more frames to be seen on sniffer.

Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.4.0.1-01734-QCAHKSWPL_SILICONZ-1

Signed-off-by: Anilkumar Kolli &lt;akolli@codeaurora.org&gt;
Signed-off-by: Kalle Valo &lt;quic_kvalo@quicinc.com&gt;
Link: https://lore.kernel.org/r/1638881695-22155-4-git-send-email-akolli@codeaurora.org
</content>
</entry>
<entry>
<title>ath11k: avoid while loop in ring selection of tx completion interrupt</title>
<updated>2021-11-15T09:21:55Z</updated>
<author>
<name>P Praneesh</name>
<email>ppranees@codeaurora.org</email>
</author>
<published>2021-11-12T09:05:58Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=cbfbed495d3289d5a0bc7c614cea639008086cfe'/>
<id>urn:sha1:cbfbed495d3289d5a0bc7c614cea639008086cfe</id>
<content type='text'>
Currently while loop is used to find the tx completion ring number and
it is not required since the tx ring mask and the group id can be combined
to directly fetch the ring number. Hence remove the while loop
and directly get the ring number from tx mask and group id.

Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-01734-QCAHKSWPL_SILICONZ-1 v2

Co-developed-by: Sriram R &lt;srirrama@codeaurora.org&gt;
Signed-off-by: Sriram R &lt;srirrama@codeaurora.org&gt;
Signed-off-by: Jouni Malinen &lt;jouni@codeaurora.org&gt;
Signed-off-by: P Praneesh &lt;ppranees@codeaurora.org&gt;
Signed-off-by: Kalle Valo &lt;kvalo@codeaurora.org&gt;
Link: https://lore.kernel.org/r/1630560820-21905-11-git-send-email-ppranees@codeaurora.org
</content>
</entry>
<entry>
<title>ath11k: allocate HAL_WBM2SW_RELEASE ring from cacheable memory</title>
<updated>2021-11-15T09:21:54Z</updated>
<author>
<name>P Praneesh</name>
<email>ppranees@codeaurora.org</email>
</author>
<published>2021-11-12T09:02:38Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=d0e2523bfa9cb391fe966b0b6948c7e438981361'/>
<id>urn:sha1:d0e2523bfa9cb391fe966b0b6948c7e438981361</id>
<content type='text'>
Similar to REO destination ring, also allocate HAL_WBM2SW_RELEASE
from cacheable memory so that descriptors could be prefetched during
tx completion handling.

Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-01734-QCAHKSWPL_SILICONZ-1 v2

Co-developed-by: Sriram R &lt;srirrama@codeaurora.org&gt;
Signed-off-by: Sriram R &lt;srirrama@codeaurora.org&gt;
Signed-off-by: Jouni Malinen &lt;jouni@codeaurora.org&gt;
Signed-off-by: P Praneesh &lt;ppranees@codeaurora.org&gt;
Signed-off-by: Kalle Valo &lt;kvalo@codeaurora.org&gt;
Link: https://lore.kernel.org/r/1630560820-21905-9-git-send-email-ppranees@codeaurora.org
</content>
</entry>
<entry>
<title>ath11k: allocate dst ring descriptors from cacheable memory</title>
<updated>2021-11-15T09:21:49Z</updated>
<author>
<name>P Praneesh</name>
<email>ppranees@codeaurora.org</email>
</author>
<published>2021-11-12T09:01:26Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=6452f0a3d5651bb7edfd9c709e78973aaa4d3bfc'/>
<id>urn:sha1:6452f0a3d5651bb7edfd9c709e78973aaa4d3bfc</id>
<content type='text'>
tcl_data and reo_dst rings are currently being allocated using
dma_allocate_coherent() which is non cacheable.

Allocating ring memory from cacheable memory area allows cached descriptor
access and prefetch next descriptors to optimize CPU usage during
descriptor processing on NAPI. Based on the hardware param we can enable
or disable this feature for the corresponding platform.

Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.4.0.1.r2-00012-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-01695-QCAHKSWPL_SILICONZ-1

Co-developed-by: Pradeep Kumar Chitrapu &lt;pradeepc@codeaurora.org&gt;
Signed-off-by: Pradeep Kumar Chitrapu &lt;pradeepc@codeaurora.org&gt;
Co-developed-by: Sriram R &lt;srirrama@codeaurora.org&gt;
Signed-off-by: Sriram R &lt;srirrama@codeaurora.org&gt;
Signed-off-by: Jouni Malinen &lt;jouni@codeaurora.org&gt;
Signed-off-by: P Praneesh &lt;ppranees@codeaurora.org&gt;
Signed-off-by: Kalle Valo &lt;kvalo@codeaurora.org&gt;
Link: https://lore.kernel.org/r/1630560820-21905-3-git-send-email-ppranees@codeaurora.org
</content>
</entry>
<entry>
<title>ath11k: change return buffer manager for QCA6390</title>
<updated>2021-10-25T13:03:08Z</updated>
<author>
<name>Baochen Qiang</name>
<email>bqiang@codeaurora.org</email>
</author>
<published>2021-10-20T08:59:06Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=734223d78428de3c7c7d7bc04daf258085780d90'/>
<id>urn:sha1:734223d78428de3c7c7d7bc04daf258085780d90</id>
<content type='text'>
QCA6390 firmware uses HAL_RX_BUF_RBM_SW1_BM, not HAL_RX_BUF_RBM_SW3_BM. This is
needed to fix a case where an A-MSDU has an unexpected LLC/SNAP header in the
first subframe (CVE-2020-24588).

Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1

Signed-off-by: Baochen Qiang &lt;bqiang@codeaurora.org&gt;
Signed-off-by: Jouni Malinen &lt;jouni@codeaurora.org&gt;
Signed-off-by: Kalle Valo &lt;kvalo@codeaurora.org&gt;
Link: https://lore.kernel.org/r/20210914163726.38604-2-jouni@codeaurora.org
</content>
</entry>
<entry>
<title>ath11k: Change number of TCL rings to one for QCA6390</title>
<updated>2021-10-11T15:12:21Z</updated>
<author>
<name>Baochen Qiang</name>
<email>bqiang@codeaurora.org</email>
</author>
<published>2021-10-11T06:33:09Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=31582373a4a8e888b29ed759d28330a1995f2162'/>
<id>urn:sha1:31582373a4a8e888b29ed759d28330a1995f2162</id>
<content type='text'>
Some targets, QCA6390 for example, use only one TCL ring, it is better to
initialize only one ring and leave others untouched for such targets.

This is a theoretical fix found during code review, no visible impact.

Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1

Signed-off-by: Baochen Qiang &lt;bqiang@codeaurora.org&gt;
Signed-off-by: Jouni Malinen &lt;jouni@codeaurora.org&gt;
Signed-off-by: Kalle Valo &lt;kvalo@codeaurora.org&gt;
Link: https://lore.kernel.org/r/20210914163726.38604-1-jouni@codeaurora.org
</content>
</entry>
<entry>
<title>ath11k: setup REO for WCN6855</title>
<updated>2021-06-12T10:31:02Z</updated>
<author>
<name>Baochen Qiang</name>
<email>bqiang@codeaurora.org</email>
</author>
<published>2021-05-31T14:41:27Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=0d55b76fd815f4d685a62afe44e623501186ceb4'/>
<id>urn:sha1:0d55b76fd815f4d685a62afe44e623501186ceb4</id>
<content type='text'>
WCN6855 needs a different reo configuration, so add separate handling
for this target in ath11k_hw_ops.

Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1

Signed-off-by: Baochen Qiang &lt;bqiang@codeaurora.org&gt;
Signed-off-by: Jouni Malinen &lt;jouni@codeaurora.org&gt;
Signed-off-by: Kalle Valo &lt;kvalo@codeaurora.org&gt;
Link: https://lore.kernel.org/r/20210511162214.29475-4-jouni@codeaurora.org
</content>
</entry>
</feed>
