kernel/drivers/net/wireless/ath/ath11k/ce.h, branch linux-6.2.y

ath11k: Replace zero-length arrays with flexible-array members

2022-02-21T10:24:34Z

There is a regular need in the kernel to provide a way to declare having a dynamically sized set of trailing elements in a structure. Kernel code should always use “flexible array members”[1] for these cases. The older style of one-element or zero-length arrays should no longer be used[2]. [1] https://en.wikipedia.org/wiki/Flexible_array_member [2] https://www.kernel.org/doc/html/v5.16/process/deprecated.html#zero-length-and-one-element-arrays Link: https://github.com/KSPP/linux/issues/78 Signed-off-by: Gustavo A. R. Silva Reviewed-by: Kees Cook Signed-off-by: Kalle Valo Link: https://lore.kernel.org/r/20220216194836.GA904035@embeddedor

ath11k: Disabling credit flow for WMI path

2021-11-17T07:28:04Z

Firmware credit flow control is enabled for WMI control services, which expects available tokens should be acquired before sending a command to the target. Also the token gets released when firmware receives the command. This credit-based flow limits driver to send WMI command only when the token available which is causing WMI commands to timeout and return -EAGAIN, whereas firmware has enough capability to process the WMI command. To fix this Tx starvation issue, introduce the ability to disable the credit flow for the WMI path. The driver sends WMI configuration for disabling credit flow to firmware by two ways. 1. By using a global flag (HTC_MSG_SETUP_COMPLETE_EX_ID msg type flags) 2. By using a local flag (ATH11K_HTC_CONN_FLAGS_DISABLE_CREDIT_FLOW_CTRL = 1 << 3) Ath11k uses both these configurations to disable credit flow for the WMI path completely. Also added a hw_param member for credit flow control by which we can enable or disable it based on per-target basis. Currently we are disabling credit flow for IPQ8074, IPQ6018, and QCN9074 as recommended by firmware. Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-01492-QCAHKSWPL_SILICONZ-1 Tested-on: IPQ6018 hw1.0 AHB WLAN.HK.2.4.0.1-00330-QCAHKSWPL_SILICONZ-1 Co-developed-by: Pravas Kumar Panda Signed-off-by: Pravas Kumar Panda Signed-off-by: P Praneesh Signed-off-by: Kalle Valo Link: https://lore.kernel.org/r/1635156494-20059-1-git-send-email-quic_ppranees@quicinc.com

ath11k: add CE interrupt support for QCN9074

2021-02-17T09:32:58Z

Define host CE configuration for QCN9074 since the max CE count is six. Available MSI interrupt is five so cannot able to map the ce_id directly for the msi_data_idx. Added get_ce_msi_idx ops in ath11k_hif_ops to get the CE MSI idx which is used to initialize the CE ring. Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.4.0.1.r2-00012-QCAHKSWPL_SILICONZ-1 Signed-off-by: Karthikeyan Periyasamy Signed-off-by: Anilkumar Kolli Signed-off-by: Kalle Valo Link: https://lore.kernel.org/r/1612946530-28504-10-git-send-email-akolli@codeaurora.org

ath11k: implement suspend for QCA6390 PCI devices

2020-12-12T04:41:44Z

Now that all the needed pieces are in place implement suspend support QCA6390 PCI devices. All other devices will return -EOPNOTSUPP during suspend. The suspend is implemented by switching the firmware to WoW mode during suspend, so the firmware will be running on low power mode while host is in suspend. At the moment we are not able to shutdown and fully power off the device due to bugs in MHI subsystem, so WoW mode is a workaround for the time being. During suspend we enable WoW mode, disable CE irq and DP irq, then put MHI to suspend state. During resume, driver resumes MHI firstly, then enables CE irq and dp IRQ, and sends WoW wakeup command to firmware. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: Carl Huang Signed-off-by: Kalle Valo Link: https://lore.kernel.org/r/1607708150-21066-11-git-send-email-kvalo@codeaurora.org

ath11k: start a timer to update HP for CE pipe 4

2020-10-01T19:33:15Z

For QCA6390, Start a timer to update CE pipe 4 ring HP when shadow register is enabled. Its' to avoid that HP isn't updated to target register. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: Carl Huang Signed-off-by: Kalle Valo Link: https://lore.kernel.org/r/1601544890-13450-7-git-send-email-kvalo@codeaurora.org

ath11k: enable shadow register configuration and access

2020-10-01T19:33:04Z

To enable shadow register access, host needs to pass shadow register configuration to firmware via qmi message. Host also needs to update ring's HP or TP address to shadow register address. The write operation to shadow register will be forwarded to target register by hardware automatically, and the write operation to shadow register is permitted even when the target is in power save or sleep mode. Update the shadow config whenever power up happens. This feature is controlled by hw parameter supports_shadow_regs which is only enabled for QCA6390. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: Carl Huang Signed-off-by: Kalle Valo Link: https://lore.kernel.org/r/1601544890-13450-3-git-send-email-kvalo@codeaurora.org

ath11k: ce: remove CE_COUNT() macro

2020-08-18T09:44:28Z

This macro is evil as it's accesses ab variable in a hidden way. It's better for readibility to access ab->hw_params.ce_count directly. This is done in a separate patch to keep the patches simple. No functional changes. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.1.0.1-01238-QCAHKSWPL_SILICONZ-2 Signed-off-by: Kalle Valo Link: https://lore.kernel.org/r/1597576599-8857-6-git-send-email-kvalo@codeaurora.org

ath11k: ce: support different CE configurations

2020-08-18T09:44:22Z

QCA6390 uses only 9 Copy Engines while IPQ8074 may use 12, make it possible to change CE configuration dynamically via hw_params. The defines for host_ce_config_wlan and CE_COUNT are temporary solutions, they will be removed in the following patches to keep things simple. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.1.0.1-01238-QCAHKSWPL_SILICONZ-2 Signed-off-by: Carl Huang Signed-off-by: Kalle Valo Link: https://lore.kernel.org/r/1597576599-8857-4-git-send-email-kvalo@codeaurora.org

ath11k: setup ce tasklet for control path

2020-08-17T10:18:24Z

CE srng is used for control path and CE srng processing is done using tasklet bottom half. Setup ce tasklet initialization and scheduling for control path. Needed for PCI support. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.1.0.1-01238-QCAHKSWPL_SILICONZ-2 Signed-off-by: Govind Singh Signed-off-by: Kalle Valo Link: https://lore.kernel.org/r/1597389030-13887-7-git-send-email-kvalo@codeaurora.org

ath11k: dump SRNG stats during FW assert

2020-03-18T11:47:27Z

Dumping the SRNG stats during FW assert, this would help in debugging ring stuck issues. Co-developed-by: Karthikeyan Periyasamy Signed-off-by: Karthikeyan Periyasamy Signed-off-by: Manikanta Pubbisetty Signed-off-by: Kalle Valo