<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/net/phy/realtek.c, branch linux-4.16.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.16.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.16.y'/>
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<updated>2018-03-22T15:41:07Z</updated>
<entry>
<title>net: phy: realtek: Use the dummy stubs for MMD register access for rtl8211b</title>
<updated>2018-03-22T15:41:07Z</updated>
<author>
<name>Kevin Hao</name>
<email>haokexin@gmail.com</email>
</author>
<published>2018-03-20T01:44:53Z</published>
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<id>urn:sha1:0231b1a074c672f8c00da00a57144072890d816b</id>
<content type='text'>
The Ethernet on mpc8315erdb is broken since commit b6b5e8a69118
("gianfar: Disable EEE autoneg by default"). The reason is that
even though the rtl8211b doesn't support the MMD extended registers
access, it does return some random values if we trying to access
the MMD register via indirect method. This makes it seem that the
EEE is supported by this phy device. And the subsequent writing to
the MMD registers does cause the phy malfunction. So use the dummy
stubs for the MMD register access to fix this issue.

Fixes: b6b5e8a69118 ("gianfar: Disable EEE autoneg by default")
Signed-off-by: Kevin Hao &lt;haokexin@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>phy: realtek: use new helpers for paged register access</title>
<updated>2018-01-16T18:56:33Z</updated>
<author>
<name>Heiner Kallweit</name>
<email>hkallweit1@gmail.com</email>
</author>
<published>2018-01-12T22:17:34Z</published>
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<id>urn:sha1:d98c8ccdebda9de011d3ea29ffb5aac57cd2b69a</id>
<content type='text'>
Make use of the new helpers for paged register access.

Signed-off-by: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: realtek: add utility functions to read/write page addresses</title>
<updated>2017-12-03T14:38:17Z</updated>
<author>
<name>Martin Blumenstingl</name>
<email>martin.blumenstingl@googlemail.com</email>
</author>
<published>2017-12-02T21:51:28Z</published>
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<id>urn:sha1:136819a6e8df374e6b9b424586ff11c9e241a1cb</id>
<content type='text'>
Realtek PHYs implement the concept of so-called "extension pages". The
reason for this is probably because these PHYs expose more registers
than available in the standard address range.
After all read/write operations on such a page are done the driver
should switch back to page 0 where the standard MII registers (such as
MII_BMCR) are available.

When referring to such a register the datasheets of RTL8211E and
RTL8211F always specify:
- the page / "ext. page" which has to be written to RTL821x_PAGE_SELECT
- an address (sometimes also called reg)

These new utility functions make the existing code easier to read since
it removes some duplication (switching back to page 0 is done within the
new helpers for example).

No functional changes are intended.

Signed-off-by: Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: realtek: use the same indentation for all #defines</title>
<updated>2017-12-03T14:38:17Z</updated>
<author>
<name>Martin Blumenstingl</name>
<email>martin.blumenstingl@googlemail.com</email>
</author>
<published>2017-12-02T21:51:27Z</published>
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<id>urn:sha1:f609ab0ed8e7bef2cd61d230bf9e83e1ec5b9ddb</id>
<content type='text'>
This simply makes the code easier to read. No functional changes.

Signed-off-by: Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: realtek: group all register bit #defines for RTL821x_INER</title>
<updated>2017-12-03T14:38:17Z</updated>
<author>
<name>Martin Blumenstingl</name>
<email>martin.blumenstingl@googlemail.com</email>
</author>
<published>2017-12-02T21:51:26Z</published>
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<id>urn:sha1:a82f266d240d87e6111878bbfe287024fb6857c1</id>
<content type='text'>
This simply moves all register bit #defines which describe the (PHY
specific) bits in the RTL821x_INER right below the RTL821x_INER register
definition. This makes it easier to spot which registers and bits belong
together.
No functional changes.

Signed-off-by: Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: realtek: rename RTL821x_INER_INIT to RTL8211B_INER_INIT</title>
<updated>2017-12-03T14:38:17Z</updated>
<author>
<name>Martin Blumenstingl</name>
<email>martin.blumenstingl@googlemail.com</email>
</author>
<published>2017-12-02T21:51:25Z</published>
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<id>urn:sha1:69021e32ec3ef02170482f6ed8130febaed27357</id>
<content type='text'>
This macro is only used by the RTL8211B code. RTL8211E and RTL8211F both
use other bits to initialize the RTL821x_INER register.
No functional changes.

Signed-off-by: Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: realtek: use the BIT and GENMASK macros</title>
<updated>2017-12-03T14:38:16Z</updated>
<author>
<name>Martin Blumenstingl</name>
<email>martin.blumenstingl@googlemail.com</email>
</author>
<published>2017-12-02T21:51:24Z</published>
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<id>urn:sha1:8cc5baefbc0266b6d6c8e99cb8568f59be36a575</id>
<content type='text'>
This makes it easier to compare the #defines with the datasheets.
No functional changes.

Signed-off-by: Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: remove generic settings for callbacks config_aneg and read_status from drivers</title>
<updated>2017-12-01T20:42:21Z</updated>
<author>
<name>Heiner Kallweit</name>
<email>hkallweit1@gmail.com</email>
</author>
<published>2017-11-30T22:47:52Z</published>
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<id>urn:sha1:80274abafc606f611c4ca8d5cebdcec8933835a9</id>
<content type='text'>
Remove generic settings for callbacks config_aneg and read_status
from drivers.

Signed-off-by: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Reviewed-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: realtek: fix RTL8211F interrupt mode</title>
<updated>2017-11-14T12:33:50Z</updated>
<author>
<name>Heiner Kallweit</name>
<email>hkallweit1@gmail.com</email>
</author>
<published>2017-11-12T15:16:04Z</published>
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<id>urn:sha1:3697d058b08d5b874f0253de173ef72e5d648f9a</id>
<content type='text'>
After commit b94d22d94ad22 "ARM64: dts: meson-gx: add external PHY
interrupt on some platforms" ethernet stopped working on my Odroid-C2
which has a RTL8211F phy.

It turned out that no interrupts were triggered. Further analysis
showed the register INER can't be altered on page 0.
Because register INSR needs to be accessed via page 0xa43 I assumed
that register INER needs to be accessed via some page too.
Some brute force check resulted in page 0xa42 being the right one.

With this patch the phy is working properly in interrupt mode.

Fixes: 3447cf2e9a11 ("net/phy: Add support for Realtek RTL8211F")
Signed-off-by: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Tested-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: realtek: add RTL8201F phy-id and functions</title>
<updated>2017-09-18T18:28:37Z</updated>
<author>
<name>Jassi Brar</name>
<email>jaswinder.singh@linaro.org</email>
</author>
<published>2017-09-12T09:54:36Z</published>
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<id>urn:sha1:513588dd44b09bb5fdd5066a4fbc1e7443b86d1c</id>
<content type='text'>
Add RTL8201F phy-id and the related functions to the driver.

The original patch is as follows:
https://patchwork.kernel.org/patch/2538341/

Signed-off-by: Jongsung Kim &lt;neidhard.kim@lge.com&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Reviewed-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
</feed>
