<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/net/phy/phy_device.c, branch linux-5.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y</id>
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<updated>2019-07-26T07:12:28Z</updated>
<entry>
<title>net: phy: Check against net_device being NULL</title>
<updated>2019-07-26T07:12:28Z</updated>
<author>
<name>Ioana Ciornei</name>
<email>ioana.ciornei@nxp.com</email>
</author>
<published>2019-05-28T17:38:09Z</published>
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<id>urn:sha1:8db10b192f96deb625f202013b0b0c6051f19031</id>
<content type='text'>
[ Upstream commit 82c76aca81187b3d28a6fb3062f6916450ce955e ]

In general, we don't want MAC drivers calling phy_attach_direct with the
net_device being NULL. Add checks against this in all the functions
calling it: phy_attach() and phy_connect_direct().

Signed-off-by: Ioana Ciornei &lt;ioana.ciornei@nxp.com&gt;
Suggested-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Reviewed-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>net: phy: improve genphy_soft_reset</title>
<updated>2019-05-31T13:43:21Z</updated>
<author>
<name>Heiner Kallweit</name>
<email>hkallweit1@gmail.com</email>
</author>
<published>2019-04-24T19:41:06Z</published>
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<id>urn:sha1:0dd7e77b7fabc2b6c63af51a74da28e8420263f4</id>
<content type='text'>
[ Upstream commit 8c90b795e90f7753d23c18e8b95dd71b4a18c5d9 ]

PHY's behave differently when being reset. Some reset registers to
defaults, some don't. Some trigger an autoneg restart, some don't.

So let's also set the autoneg restart bit when resetting. Then PHY
behavior should be more consistent. Clearing BMCR_ISOLATE serves the
same purpose and is borrowed from genphy_restart_aneg.

BMCR holds the speed / duplex settings in fixed mode. Therefore
we may have an issue if a soft reset resets BMCR to its default.
So better call genphy_setup_forced() afterwards in fixed mode.
We've seen no related complaint in the last &gt;10 yrs, so let's
treat it as an improvement.

Signed-off-by: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>net: phy: fix phy_validate_pause</title>
<updated>2019-05-16T17:35:38Z</updated>
<author>
<name>Heiner Kallweit</name>
<email>hkallweit1@gmail.com</email>
</author>
<published>2019-05-01T19:54:28Z</published>
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<id>urn:sha1:b58df9d780cfc187b8453f7745204e72e2b593ed</id>
<content type='text'>
[ Upstream commit b4010af981ac8cdf1f7f58eb6b131c482e5dee02 ]

We have valid scenarios where ETHTOOL_LINK_MODE_Pause_BIT doesn't
need to be supported. Therefore extend the first check to check
for rx_pause being set.

See also phy_set_asym_pause:
rx=0 and tx=1: advertise asym pause only
rx=0 and tx=0: stop advertising both pause modes

The fixed commit isn't wrong, it's just the one that introduced the
linkmode bitmaps.

Fixes: 3c1bcc8614db ("net: ethernet: Convert phydev advertize and supported from u32 to link mode")
Signed-off-by: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>net: phy: don't clear BMCR in genphy_soft_reset</title>
<updated>2019-03-26T00:08:21Z</updated>
<author>
<name>Heiner Kallweit</name>
<email>hkallweit1@gmail.com</email>
</author>
<published>2019-03-22T19:00:20Z</published>
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<id>urn:sha1:d29f5aa0bc0c321e1b9e4658a2a7e08e885da52a</id>
<content type='text'>
So far we effectively clear the BMCR register. Some PHY's can deal
with this (e.g. because they reset BMCR to a default as part of a
soft-reset) whilst on others this causes issues because e.g. the
autoneg bit is cleared. Marvell is an example, see also thread [0].
So let's be a little bit more gentle and leave all bits we're not
interested in as-is. This change is needed for PHY drivers to
properly deal with the original patch.

[0] https://marc.info/?t=155264050700001&amp;r=1&amp;w=2

Fixes: 6e2d85ec0559 ("net: phy: Stop with excessive soft reset")
Tested-by: Phil Reid &lt;preid@electromag.com.au&gt;
Tested-by: liweihang &lt;liweihang@hisilicon.com&gt;
Signed-off-by: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Reviewed-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: export genphy_config_eee_advert</title>
<updated>2019-02-21T21:03:06Z</updated>
<author>
<name>Heiner Kallweit</name>
<email>hkallweit1@gmail.com</email>
</author>
<published>2019-02-18T20:26:58Z</published>
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<id>urn:sha1:cd34499cacf3c34e2e094ff2a347b9378417970c</id>
<content type='text'>
We want to use this function in phy-c45.c too, therefore export it.

Signed-off-by: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: don't use 10BaseT/half as default in genphy_read_status</title>
<updated>2019-02-21T20:57:25Z</updated>
<author>
<name>Heiner Kallweit</name>
<email>hkallweit1@gmail.com</email>
</author>
<published>2019-02-18T19:29:36Z</published>
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<id>urn:sha1:51f9f234dac5284333a047b7906f3095d410e6c3</id>
<content type='text'>
If link partner and we can't agree on any mode, then it doesn't make
sense to pretend we would have agreed on 10/half. Therefore set a
proper default.

Signed-off-by: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Reviewed-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: remove orphaned register read in genphy_read_status</title>
<updated>2019-02-21T20:57:25Z</updated>
<author>
<name>Heiner Kallweit</name>
<email>hkallweit1@gmail.com</email>
</author>
<published>2019-02-18T19:28:54Z</published>
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<id>urn:sha1:40d5432cd50edf2b8a8a466a2ad48b487fec17f6</id>
<content type='text'>
After recent changes to genphy_read_status() this orphaned register
read remained as leftover. So remove it.

Signed-off-by: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: use phy_resolve_aneg_linkmode in genphy_read_status</title>
<updated>2019-02-17T23:21:38Z</updated>
<author>
<name>Heiner Kallweit</name>
<email>hkallweit1@gmail.com</email>
</author>
<published>2019-02-14T21:16:27Z</published>
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<id>urn:sha1:5502b218e00161efd20ff1a789f51a332f13f8cd</id>
<content type='text'>
Now that we have phy_resolve_aneg_linkmode() we can make
genphy_read_status() much simpler.

Signed-off-by: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: Move of_set_phy_eee_broken to phy-core.c</title>
<updated>2019-02-14T00:17:53Z</updated>
<author>
<name>Maxime Chevallier</name>
<email>maxime.chevallier@bootlin.com</email>
</author>
<published>2019-02-11T14:25:27Z</published>
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<id>urn:sha1:3feb9b23bf4cbf9f34568035170c6f1c25416523</id>
<content type='text'>
Since of_set_phy_supported was moved to phy-core.c, we can also move
of_set_phy_eee_broken to the same location, so that we have all OF
functions in the same place.

This patch doesn't intend to introduce any change in behaviour.

Signed-off-by: Maxime Chevallier &lt;maxime.chevallier@bootlin.com&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: Mask-out non-compatible modes when setting the max-speed</title>
<updated>2019-02-14T00:17:53Z</updated>
<author>
<name>Maxime Chevallier</name>
<email>maxime.chevallier@bootlin.com</email>
</author>
<published>2019-02-11T14:25:26Z</published>
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<id>urn:sha1:a4eaed9f9a895b16bb2c54e0ff6b3c99404fec92</id>
<content type='text'>
When setting a PHY's max speed using either the max-speed DT property
or ethtool, we should mask-out all non-compatible modes according to the
settings table, instead of just the 10/100BASET modes.

Signed-off-by: Maxime Chevallier &lt;maxime.chevallier@bootlin.com&gt;
Suggested-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
</feed>
