<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/net/phy/phy_device.c, branch linux-4.16.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.16.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.16.y'/>
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<updated>2018-03-22T15:41:07Z</updated>
<entry>
<title>net: phy: Add general dummy stubs for MMD register access</title>
<updated>2018-03-22T15:41:07Z</updated>
<author>
<name>Kevin Hao</name>
<email>haokexin@gmail.com</email>
</author>
<published>2018-03-20T01:44:52Z</published>
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<id>urn:sha1:5df7af85ecd88e8b5f1f31d6456c3cf38a8bbdda</id>
<content type='text'>
For some phy devices, even though they don't support the MMD extended
register access, it does have some side effect if we are trying to
read/write the MMD registers via indirect method. So introduce general
dummy stubs for MMD register access which these devices can use to avoid
such side effect.

Fixes: b6b5e8a69118 ("gianfar: Disable EEE autoneg by default")
Signed-off-by: Kevin Hao &lt;haokexin@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: relax error checking when creating sysfs link netdev-&gt;phydev</title>
<updated>2018-03-20T01:14:27Z</updated>
<author>
<name>Grygorii Strashko</name>
<email>grygorii.strashko@ti.com</email>
</author>
<published>2018-03-16T22:08:35Z</published>
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<id>urn:sha1:4414b3ed74be0e205e04e12cd83542a727d88255</id>
<content type='text'>
Some ethernet drivers (like TI CPSW) may connect and manage &gt;1 Net PHYs per
one netdevice, as result such drivers will produce warning during system
boot and fail to connect second phy to netdevice when PHYLIB framework
will try to create sysfs link netdev-&gt;phydev for second PHY
in phy_attach_direct(), because sysfs link with the same name has been
created already for the first PHY. As result, second CPSW external
port will became unusable.

Fix it by relaxing error checking when PHYLIB framework is creating sysfs
link netdev-&gt;phydev in phy_attach_direct(), suppressing warning by using
sysfs_create_link_nowarn() and adding error message instead.
After this change links (phy-&gt;netdev and netdev-&gt;phy) creation failure is not
fatal any more and system can continue working, which fixes TI CPSW issue.

Cc: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Cc: Andrew Lunn &lt;andrew@lunn.ch&gt;
Fixes: a3995460491d ("net: phy: Relax error checking on sysfs_create_link()")
Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: Restore phy_resume() locking assumption</title>
<updated>2018-02-27T19:32:09Z</updated>
<author>
<name>Andrew Lunn</name>
<email>andrew@lunn.ch</email>
</author>
<published>2018-02-27T00:56:06Z</published>
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<id>urn:sha1:9c2c2e62df3fa30fb13fbeb7512a4eede729383b</id>
<content type='text'>
commit f5e64032a799 ("net: phy: fix resume handling") changes the
locking semantics for phy_resume() such that the caller now needs to
hold the phy mutex. Not all call sites were adopted to this new
semantic, resulting in warnings from the added
WARN_ON(!mutex_is_locked(&amp;phydev-&gt;lock)).  Rather than change the
semantics, add a __phy_resume() and restore the old behavior of
phy_resume().

Reported-by: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Fixes: f5e64032a799 ("net: phy: fix resume handling")
Signed-off-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Reviewed-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: fix wrong mask to phy_modify()</title>
<updated>2018-02-12T16:42:48Z</updated>
<author>
<name>Ingo van Lil</name>
<email>inguin@gmx.de</email>
</author>
<published>2018-02-12T11:02:52Z</published>
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<id>urn:sha1:18a5b052bb1ae77453c5e50fffe3470ced9ed82f</id>
<content type='text'>
When forcing a specific link mode, the PHY driver must clear the
existing speed and duplex bits in BMCR while preserving some other
control bits. This logic was accidentally inverted with the introduction
of phy_modify().

Fixes: fea23fb591cc ("net: phy: convert read-modify-write to phy_modify()")
Signed-off-by: Ingo van Lil &lt;inguin@gmx.de&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>phy: use new helpers phy_set_bits/phy_clear_bits in phylib</title>
<updated>2018-01-16T17:25:10Z</updated>
<author>
<name>Heiner Kallweit</name>
<email>hkallweit1@gmail.com</email>
</author>
<published>2018-01-12T20:20:36Z</published>
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<id>urn:sha1:032f4700814346ff935531a9dfa8ecfaeeb38c07</id>
<content type='text'>
Use new helpers phy_set_bits / phy_clear_bits in phylib.

Signed-off-by: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: fix wrong masks to phy_modify()</title>
<updated>2018-01-08T19:20:21Z</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@armlinux.org.uk</email>
</author>
<published>2018-01-05T16:07:10Z</published>
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<id>urn:sha1:f102852f980eac250855504c18f195900616deec</id>
<content type='text'>
The mask argument for phy_modify() in several locations was inverted.

Fixes: fea23fb591cc ("net: phy: convert read-modify-write to phy_modify()")
Reported-by: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Tested-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: convert read-modify-write to phy_modify()</title>
<updated>2018-01-03T16:00:23Z</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@armlinux.org.uk</email>
</author>
<published>2018-01-02T10:58:58Z</published>
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<id>urn:sha1:fea23fb591cce99546baca043d2a068228e87a79</id>
<content type='text'>
Convert read-modify-write sequences in at803x, Marvell and core phylib
to use phy_modify() to ensure safety.

Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net</title>
<updated>2017-12-17T03:11:55Z</updated>
<author>
<name>David S. Miller</name>
<email>davem@davemloft.net</email>
</author>
<published>2017-12-17T03:11:55Z</published>
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<id>urn:sha1:c30abd5e40dd863f88e26be09b6ce949145a630a</id>
<content type='text'>
Three sets of overlapping changes, two in the packet scheduler
and one in the meson-gxl PHY driver.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: fix resume handling</title>
<updated>2017-12-13T20:00:10Z</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@armlinux.org.uk</email>
</author>
<published>2017-12-12T10:45:36Z</published>
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<id>urn:sha1:f5e64032a799d4f54decc7eb6aafcdffb67f9ad9</id>
<content type='text'>
When a PHY has the BMCR_PDOWN bit set, it may decide to ignore writes
to other registers, or reset the registers to power-on defaults.
Micrel PHYs do this for their interrupt registers.

The current structure of phylib tries to enable interrupts before
resuming (and releasing) the BMCR_PDOWN bit.  This fails, causing
Micrel PHYs to stop working after a suspend/resume sequence if they
are using interrupts.

Fix this by ensuring that the PHY driver resume methods do not take
the phydev-&gt;lock mutex themselves, but the callers of phy_resume()
take that lock.  This then allows us to move the call to phy_resume()
before we enable interrupts in phy_start().

Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>phylib: add reset after clk enable support</title>
<updated>2017-12-13T16:22:53Z</updated>
<author>
<name>Richard Leitner</name>
<email>richard.leitner@skidata.com</email>
</author>
<published>2017-12-11T12:16:58Z</published>
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<id>urn:sha1:a96684914adb4adb9f81faf6917e0673b92288d8</id>
<content type='text'>
Some PHYs need the refclk to be a continuous clock. Therefore they don't
allow turning it off and on again during operation. Nonetheless such a
clock switching is performed by some ETH drivers (namely FEC [1]) for
power saving reasons. An example for an affected PHY is the
SMSC/Microchip LAN8720 in "REF_CLK In Mode".

In order to provide a uniform method to overcome this problem this patch
adds a new phy_driver flag (PHY_RST_AFTER_CLK_EN) and corresponding
function phy_reset_after_clk_enable() to the phylib. These should be
used to trigger reset of the PHY after the refclk is switched on again.

[1] commit e8fcfcd5684a ("net: fec: optimize the clock management to save power")

Signed-off-by: Richard Leitner &lt;richard.leitner@skidata.com&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
</feed>
