<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/net/phy/mscc/mscc_main.c, branch linux-6.9.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.9.y</id>
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<updated>2023-12-17T20:10:07Z</updated>
<entry>
<title>net: phy: extend PHY package API to support multiple global address</title>
<updated>2023-12-17T20:10:07Z</updated>
<author>
<name>Christian Marangi</name>
<email>ansuelsmth@gmail.com</email>
</author>
<published>2023-12-15T13:15:32Z</published>
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<id>urn:sha1:9eea577eb1155fe4a183bc5e7bf269b0b2e7a6ba</id>
<content type='text'>
Current API for PHY package are limited to single address to configure
global settings for the PHY package.

It was found that some PHY package (for example the qca807x, a PHY
package that is shipped with a bundle of 5 PHY) requires multiple PHY
address to configure global settings. An example scenario is a PHY that
have a dedicated PHY for PSGMII/serdes calibrarion and have a specific
PHY in the package where the global PHY mode is set and affects every
other PHY in the package.

Change the API in the following way:
- Change phy_package_join() to take the base addr of the PHY package
  instead of the global PHY addr.
- Make __/phy_package_write/read() require an additional arg that
  select what global PHY address to use by passing the offset from the
  base addr passed on phy_package_join().

Each user of this API is updated to follow this new implementation
following a pattern where an enum is defined to declare the offset of the
addr.

We also drop the check if shared is defined as any user of the
phy_package_read/write is expected to use phy_package_join first. Misuse
of this will correctly trigger a kernel panic for NULL pointer
exception.

Signed-off-by: Christian Marangi &lt;ansuelsmth@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: mscc: fix packet loss due to RGMII delays</title>
<updated>2023-06-27T16:31:51Z</updated>
<author>
<name>Vladimir Oltean</name>
<email>vladimir.oltean@nxp.com</email>
</author>
<published>2023-06-27T13:42:35Z</published>
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<id>urn:sha1:528a08bcd820d07887edeae706df88ceb06db109</id>
<content type='text'>
Two deadly typos break RX and TX traffic on the VSC8502 PHY using RGMII
if phy-mode = "rgmii-id" or "rgmii-txid", and no "tx-internal-delay-ps"
override exists. The negative error code from phy_get_internal_delay()
does not get overridden with the delay deduced from the phy-mode, and
later gets committed to hardware. Also, the rx_delay gets overridden by
what should have been the tx_delay.

Fixes: dbb050d2bfc8 ("phy: mscc: Add support for RGMII delay configuration")
Signed-off-by: Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;
Reviewed-by: Harini Katakam &lt;harini.katakam@amd.com&gt;
Reviewed-by: Simon Horman &lt;simon.horman@corigine.com&gt;
Link: https://lore.kernel.org/r/20230627134235.3453358-1-vladimir.oltean@nxp.com
Signed-off-by: Jakub Kicinski &lt;kuba@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: mscc: Add support for RGMII delay configuration</title>
<updated>2023-06-01T05:33:45Z</updated>
<author>
<name>Harini Katakam</name>
<email>harini.katakam@amd.com</email>
</author>
<published>2023-05-29T12:20:17Z</published>
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<id>urn:sha1:dbb050d2bfc8a91dfa3d020c51633c077a53d18b</id>
<content type='text'>
Add support for optional rx/tx-internal-delay-ps from devicetree.
- When rx/tx-internal-delay-ps is/are specified, these take priority
- When either is absent,
1) use 2ns for respective settings if rgmii-id/rxid/txid is/are present
2) use 0.2ns for respective settings if mode is rgmii

Signed-off-by: Harini Katakam &lt;harini.katakam@amd.com&gt;
Signed-off-by: Jakub Kicinski &lt;kuba@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: mscc: Use PHY_ID_MATCH_VENDOR to minimize PHY ID table</title>
<updated>2023-06-01T05:33:45Z</updated>
<author>
<name>Harini Katakam</name>
<email>harini.katakam@amd.com</email>
</author>
<published>2023-05-29T12:20:16Z</published>
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<id>urn:sha1:31605c01fb242806f5b8c9d08abe11328d514206</id>
<content type='text'>
All the PHY devices variants specified have the same mask and
hence can be simplified to one vendor look up for 0x00070400.
Any individual config can be identified by PHY_ID_MATCH_EXACT
in the respective structure.

Signed-off-by: Harini Katakam &lt;harini.katakam@amd.com&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: Jakub Kicinski &lt;kuba@kernel.org&gt;
</content>
</entry>
<entry>
<title>net: phy: mscc: enable VSC8501/2 RGMII RX clock</title>
<updated>2023-05-25T05:14:23Z</updated>
<author>
<name>David Epping</name>
<email>david.epping@missinglinkelectronics.com</email>
</author>
<published>2023-05-23T15:31:08Z</published>
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<id>urn:sha1:71460c9ec5c743e9ffffca3c874d66267c36345e</id>
<content type='text'>
By default the VSC8501 and VSC8502 RGMII/GMII/MII RX_CLK output is
disabled. To allow packet forwarding towards the MAC it needs to be
enabled.

For other PHYs supported by this driver the clock output is enabled
by default.

Fixes: d3169863310d ("net: phy: mscc: add support for VSC8502")
Signed-off-by: David Epping &lt;david.epping@missinglinkelectronics.com&gt;
Reviewed-by: Russell King (Oracle) &lt;rmk+kernel@armlinux.org.uk&gt;
Reviewed-by: Vladimir Oltean &lt;olteanv@gmail.com&gt;
Signed-off-by: Jakub Kicinski &lt;kuba@kernel.org&gt;
</content>
</entry>
<entry>
<title>net: phy: mscc: remove unnecessary phydev locking</title>
<updated>2023-05-25T05:14:10Z</updated>
<author>
<name>David Epping</name>
<email>david.epping@missinglinkelectronics.com</email>
</author>
<published>2023-05-23T15:31:07Z</published>
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<id>urn:sha1:7df0b33d7993338a06e4039ec025bb67851ee41d</id>
<content type='text'>
Holding the struct phy_device (phydev) lock is unnecessary when
accessing phydev-&gt;interface in the PHY driver .config_init method,
which is the only place that vsc85xx_rgmii_set_skews() is called from.

The phy_modify_paged() function implements required MDIO bus level
locking, which can not be achieved by a phydev lock.

Signed-off-by: David Epping &lt;david.epping@missinglinkelectronics.com&gt;
Reviewed-by: Russell King (Oracle) &lt;rmk+kernel@armlinux.org.uk&gt;
Signed-off-by: Jakub Kicinski &lt;kuba@kernel.org&gt;
</content>
</entry>
<entry>
<title>net: phy: mscc: add support for VSC8501</title>
<updated>2023-05-25T05:14:10Z</updated>
<author>
<name>David Epping</name>
<email>david.epping@missinglinkelectronics.com</email>
</author>
<published>2023-05-23T15:31:06Z</published>
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<id>urn:sha1:fb055ce4a9e3a115f5dc42011a97cf0cfc7820e4</id>
<content type='text'>
The VSC8501 PHY can use the same driver implementation as the VSC8502.
Adding the PHY ID and copying the handler functions of VSC8502 is
sufficient to operate it.

Signed-off-by: David Epping &lt;david.epping@missinglinkelectronics.com&gt;
Reviewed-by: Vladimir Oltean &lt;olteanv@gmail.com&gt;
Signed-off-by: Jakub Kicinski &lt;kuba@kernel.org&gt;
</content>
</entry>
<entry>
<title>net: phy: mscc: add VSC8502 to MODULE_DEVICE_TABLE</title>
<updated>2023-05-25T05:14:10Z</updated>
<author>
<name>David Epping</name>
<email>david.epping@missinglinkelectronics.com</email>
</author>
<published>2023-05-23T15:31:05Z</published>
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<id>urn:sha1:57fb54ab9f6945e204740b696bd4cee61ee04e5e</id>
<content type='text'>
The mscc driver implements support for VSC8502, so its ID should be in
the MODULE_DEVICE_TABLE for automatic loading.

Signed-off-by: David Epping &lt;david.epping@missinglinkelectronics.com&gt;
Fixes: d3169863310d ("net: phy: mscc: add support for VSC8502")
Reviewed-by: Vladimir Oltean &lt;olteanv@gmail.com&gt;
Signed-off-by: Jakub Kicinski &lt;kuba@kernel.org&gt;
</content>
</entry>
<entry>
<title>net: phy: mscc: fix deadlock in phy_ethtool_{get,set}_wol()</title>
<updated>2023-03-16T04:33:22Z</updated>
<author>
<name>Vladimir Oltean</name>
<email>vladimir.oltean@nxp.com</email>
</author>
<published>2023-03-14T15:30:25Z</published>
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<id>urn:sha1:cd356010ce4c69ac7e1a40586112df24d22c6a4b</id>
<content type='text'>
Since the blamed commit, phy_ethtool_get_wol() and phy_ethtool_set_wol()
acquire phydev-&gt;lock, but the mscc phy driver implementations,
vsc85xx_wol_get() and vsc85xx_wol_set(), acquire the same lock as well,
resulting in a deadlock.

$ ip link set swp3 down
============================================
WARNING: possible recursive locking detected
mscc_felix 0000:00:00.5 swp3: Link is Down
--------------------------------------------
ip/375 is trying to acquire lock:
ffff3d7e82e987a8 (&amp;dev-&gt;lock){+.+.}-{4:4}, at: vsc85xx_wol_get+0x2c/0xf4

but task is already holding lock:
ffff3d7e82e987a8 (&amp;dev-&gt;lock){+.+.}-{4:4}, at: phy_ethtool_get_wol+0x3c/0x6c

other info that might help us debug this:
 Possible unsafe locking scenario:

       CPU0
       ----
  lock(&amp;dev-&gt;lock);
  lock(&amp;dev-&gt;lock);

 *** DEADLOCK ***

 May be due to missing lock nesting notation

2 locks held by ip/375:
 #0: ffffd43b2a955788 (rtnl_mutex){+.+.}-{4:4}, at: rtnetlink_rcv_msg+0x144/0x58c
 #1: ffff3d7e82e987a8 (&amp;dev-&gt;lock){+.+.}-{4:4}, at: phy_ethtool_get_wol+0x3c/0x6c

Call trace:
 __mutex_lock+0x98/0x454
 mutex_lock_nested+0x2c/0x38
 vsc85xx_wol_get+0x2c/0xf4
 phy_ethtool_get_wol+0x50/0x6c
 phy_suspend+0x84/0xcc
 phy_state_machine+0x1b8/0x27c
 phy_stop+0x70/0x154
 phylink_stop+0x34/0xc0
 dsa_port_disable_rt+0x2c/0xa4
 dsa_slave_close+0x38/0xec
 __dev_close_many+0xc8/0x16c
 __dev_change_flags+0xdc/0x218
 dev_change_flags+0x24/0x6c
 do_setlink+0x234/0xea4
 __rtnl_newlink+0x46c/0x878
 rtnl_newlink+0x50/0x7c
 rtnetlink_rcv_msg+0x16c/0x58c

Removing the mutex_lock(&amp;phydev-&gt;lock) calls from the driver restores
the functionality.

Fixes: 2f987d486610 ("net: phy: Add locks to ethtool functions")
Signed-off-by: Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;
Reviewed-by: Simon Horman &lt;simon.horman@corigine.com&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Link: https://lore.kernel.org/r/20230314153025.2372970-1-vladimir.oltean@nxp.com
Signed-off-by: Jakub Kicinski &lt;kuba@kernel.org&gt;
</content>
</entry>
<entry>
<title>net: move from strlcpy with unused retval to strscpy</title>
<updated>2022-08-31T21:11:07Z</updated>
<author>
<name>Wolfram Sang</name>
<email>wsa+renesas@sang-engineering.com</email>
</author>
<published>2022-08-30T20:14:52Z</published>
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<id>urn:sha1:fb3ceec187e8bca474340e361a18163a2e79c0a2</id>
<content type='text'>
Follow the advice of the below link and prefer 'strscpy' in this
subsystem. Conversion is 1:1 because the return value is not used.
Generated by a coccinelle script.

Link: https://lore.kernel.org/r/CAHk-=wgfRnXz0W3D37d01q3JFkr_i_uTL=V6A6G1oUZcprmknw@mail.gmail.com/
Signed-off-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Acked-by: Marc Kleine-Budde &lt;mkl@pengutronix.de&gt; # for CAN
Link: https://lore.kernel.org/r/20220830201457.7984-1-wsa+renesas@sang-engineering.com
Signed-off-by: Jakub Kicinski &lt;kuba@kernel.org&gt;
</content>
</entry>
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