<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/net/ethernet/stmicro, branch linux-4.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.1.y</id>
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<updated>2015-12-09T19:03:11Z</updated>
<entry>
<title>stmmac: Correctly report PTP capabilities.</title>
<updated>2015-12-09T19:03:11Z</updated>
<author>
<name>Phil Reid</name>
<email>preid@electromag.com.au</email>
</author>
<published>2015-10-30T08:43:55Z</published>
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<id>urn:sha1:dd963c7aeb1f8059ea931afab2aa4ba5f09eb496</id>
<content type='text'>
[ Upstream commit e6dbe1eb2db0d7a14991c06278dd3030c45fb825 ]

priv-&gt;hwts_*_en indicate if timestamping is enabled/disabled at run
time. But  priv-&gt;dma_cap.time_stamp  and priv-&gt;dma_cap.atime_stamp
indicates HW is support for PTPv1/PTPv2.

Signed-off-by: Phil Reid &lt;preid@electromag.com.au&gt;
Acked-by: Richard Cochran &lt;richardcochran@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>net: stmmac: dwmac-rk: Fix clk rate when provided by soc</title>
<updated>2015-09-29T17:26:18Z</updated>
<author>
<name>Heiko Stübner</name>
<email>heiko@sntech.de</email>
</author>
<published>2015-06-21T19:52:52Z</published>
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<id>urn:sha1:2a0538e207c245fa649a090eaa3585302eb950e5</id>
<content type='text'>
commit c48fa33c1fb2ccdb4bcc863a7b841f11efe0f8b0 upstream.

The first iteration of the dwmac-rk support did access an intermediate
clock directly below the pll selector. This was removed in a subsequent
revision, but the clock and one invocation remained. This results in
the driver trying to set the rate of a non-existent clock when the soc
and not some external source provides the phy clock for RMII phys.

So set the rate of the correct clock and remove the remaining now
completely unused definition.

Fixes: 436f5ae08f9d ("GMAC: add driver for Rockchip RK3288 SoCs integrated GMAC")
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>stmmac: troubleshoot unexpected bits in des0 &amp; des1</title>
<updated>2015-09-29T17:26:18Z</updated>
<author>
<name>Alexey Brodkin</name>
<email>Alexey.Brodkin@synopsys.com</email>
</author>
<published>2015-06-24T08:47:41Z</published>
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<id>urn:sha1:4d95fbcd38406f6747aeb86560a15a95e4527cc4</id>
<content type='text'>
commit f1590670ce069eefeb93916391a67643e6ad1630 upstream.

Current implementation of descriptor init procedure only takes
care about setting/clearing ownership flag in "des0"/"des1"
fields while it is perfectly possible to get unexpected bits
set because of the following factors:

 [1] On driver probe underlying memory allocated with
     dma_alloc_coherent() might not be zeroed and so
     it will be filled with garbage.

 [2] During driver operation some bits could be set by SD/MMC
     controller (for example error flags etc).

And unexpected and/or randomly set flags in "des0"/"des1"
fields may lead to unpredictable behavior of GMAC DMA block.

This change addresses both items above with:

 [1] Use of dma_zalloc_coherent() instead of simple
     dma_alloc_coherent() to make sure allocated memory is
     zeroed. That shouldn't affect performance because
     this allocation only happens once on driver probe.

 [2] Do explicit zeroing of both "des0" and "des1" fields
     of all buffer descriptors during initialization of
     DMA transfer.

And while at it fixed identation of dma_free_coherent()
counterpart as well.

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
Cc: Giuseppe Cavallaro &lt;peppe.cavallaro@st.com&gt;
Cc: arc-linux-dev@synopsys.com
Cc: linux-kernel@vger.kernel.org
Cc: stable@vger.kernel.org
Cc: David Miller &lt;davem@davemloft.net&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>stmmac: fix check for phydev being open</title>
<updated>2015-09-29T17:26:18Z</updated>
<author>
<name>Alexey Brodkin</name>
<email>Alexey.Brodkin@synopsys.com</email>
</author>
<published>2015-09-09T15:01:08Z</published>
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<id>urn:sha1:79866f313766dd2e8e118053e1eb8bd5abd608ac</id>
<content type='text'>
commit dfc50fcaad574e5c8c85cbc83eca1426b2413fa4 upstream.

Current check of phydev with IS_ERR(phydev) may make not much sense
because of_phy_connect() returns NULL on failure instead of error value.

Still for checking result of phy_connect() IS_ERR() makes perfect sense.

So let's use combined check IS_ERR_OR_NULL() that covers both cases.

Cc: Sergei Shtylyov &lt;sergei.shtylyov@cogentembedded.com&gt;
Cc: Giuseppe Cavallaro &lt;peppe.cavallaro@st.com&gt;
Cc: linux-kernel@vger.kernel.org
Cc: David Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>net: stmmac: create one debugfs dir per net-device</title>
<updated>2015-05-25T21:38:23Z</updated>
<author>
<name>Mathieu Olivari</name>
<email>mathieu@codeaurora.org</email>
</author>
<published>2015-05-23T02:03:29Z</published>
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<id>urn:sha1:466c5ac8bdf29a382d064923a60ef302dd3b2aeb</id>
<content type='text'>
stmmac DebugFS entries are currently global to the driver. As a result,
having more than one stmmac device in the system creates the following
error:
* ERROR stmmaceth, debugfs create directory failed
* stmmac_hw_setup: failed debugFS registration

This also results in being able to access the debugfs information for
the first registered device only.

This patch changes the debugfs structure to have one sub-directory per
net-device. Files under "/sys/kernel/debug/stmmaceth" will now show-up
under /sys/kernel/debug/stmmaceth/ethN/.

Signed-off-by: Mathieu Olivari &lt;mathieu@codeaurora.org&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>drivers/net: include &lt;module.h&gt; for modular stmmac_platform code</title>
<updated>2015-05-04T03:40:09Z</updated>
<author>
<name>Paul Gortmaker</name>
<email>paul.gortmaker@windriver.com</email>
</author>
<published>2015-05-01T01:47:42Z</published>
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<id>urn:sha1:f0e9fc503a0d6c9d74ca5b6d1aaf87febbbd9b06</id>
<content type='text'>
This file is built off of a tristate Kconfig option and also contains
modular function calls so it should explicitly include module.h to
avoid compile breakage during header shuffles done in the future.

Cc: Giuseppe Cavallaro &lt;peppe.cavallaro@st.com&gt;
Cc: netdev@vger.kernel.org
Signed-off-by: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>stmmac: Configure Flow Control to work correctly based on rxfifo size</title>
<updated>2015-04-16T17:58:42Z</updated>
<author>
<name>Vince Bridgers</name>
<email>vbridger@opensource.altera.com</email>
</author>
<published>2015-04-15T16:17:42Z</published>
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<id>urn:sha1:f88203a229cca0b3634738b7dae47419d1da6dc8</id>
<content type='text'>
Configure flow control correctly, and based on the receive fifo size read
as a property from the devicetree since the Synopsys stmmac fifo sizes are
configurable based on a particular chip's implementation. This patch maintains
the previous incorrect behavior unless the receive fifo size is found in the
devicetree.

Signed-off-by: Vince Bridgers &lt;vbridger@opensource.altera.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>stmmac: Enable unicast pause frame detect in GMAC Register 6</title>
<updated>2015-04-16T17:58:42Z</updated>
<author>
<name>Vince Bridgers</name>
<email>vbridger@opensource.altera.com</email>
</author>
<published>2015-04-15T16:17:41Z</published>
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<id>urn:sha1:545d655ebbea65986cb762905b81bff54f42eb6d</id>
<content type='text'>
Unicast pause frame detect was not being enabled for the Synopsys stmmac. This
patch sets Unicast pause frame detect in MAC register 6 so that pause frame
detection by the stmmac conforms to IEEE 802.3, Annex 31B.3.3 Receive
Operation - Specifically, a MAC shall respond to pause frames containing
either the reserved multicast address or the unique physical address
associated with this station.

Signed-off-by: Vince Bridgers &lt;vbridger@opensource.altera.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>stmmac: Read tx-fifo-depth and rx-fifo-depth from the devicetree</title>
<updated>2015-04-16T17:58:42Z</updated>
<author>
<name>Vince Bridgers</name>
<email>vbridger@opensource.altera.com</email>
</author>
<published>2015-04-15T16:17:40Z</published>
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<id>urn:sha1:e7877f52fd4a8d7012f9b0faecc047a50c132a79</id>
<content type='text'>
Read the tx-fifo-depth and rx-fifo-depth from the devicetree. The Synopsys
stmmac controller fifos are configurable per product instance, and the fifo
sizes are needed to configure certain features correctly such as flow control.

Signed-off-by: Vince Bridgers &lt;vbridger@opensource.altera.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>stmmac: Add defines and documentation for enabling flow control</title>
<updated>2015-04-16T17:58:42Z</updated>
<author>
<name>Vince Bridgers</name>
<email>vbridger@opensource.altera.com</email>
</author>
<published>2015-04-15T16:17:39Z</published>
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<id>urn:sha1:2453beb632e3e8c194c87953a536a4c58b149867</id>
<content type='text'>
Add defines and documentation for enabling flow control on the stmmac. Flow
control was not implemented correctly on the stmmac driver and is currently
non-functional as a result. This is the first in a series of small patches
to correctly implement this feature.

Signed-off-by: Vince Bridgers &lt;vbridger@opensource.altera.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
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