kernel/drivers/net/ethernet/mediatek/mtk_eth_path.c, branch linux-6.18.y

net: ethernet: mtk_eth_soc: add support for MT7988 internal 2.5G PHY

2025-05-02T01:00:15Z

The MediaTek MT7988 SoC comes with an single built-in Ethernet PHY for 2500Base-T/1000Base-T/100Base-TX/10Base-T link partners in addition to the built-in 1GE switch. The built-in PHY only supports full duplex. Add muxes allowing to select GMAC2->2.5G PHY path and add basic support for XGMAC as the built-in 2.5G PHY is internally connected via XGMII. The XGMAC features will also be used by 5GBase-R, 10GBase-R and USXGMII SerDes modes which are going to be added once support for standalone PCS drivers is in place. In order to make use of the built-in 2.5G PHY the appropriate PHY driver as well as (proprietary) PHY firmware has to be present as well. Signed-off-by: Daniel Golle Link: https://patch.msgid.link/9072cefbff6db969720672ec98ed5cef65e8218c.1745715380.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski

net: ethernet: mtk_eth_soc: convert cap_bit in mtk_eth_muxc struct to u64

2025-04-25T00:04:08Z

With commit 51a4df60db5c2 ("net: ethernet: mtk_eth_soc: convert caps in mtk_soc_data struct to u64") the capabilities bitfield was converted to a 64-bit value, but a cap_bit in struct mtk_eth_muxc which is used to store a full bitfield (rather than the bit number, as the name would suggest) still holds only a 32-bit value. Change the type of cap_bit to u64 in order to avoid truncating the bitfield which results in path selection to not work with capabilities above the 32-bit limit. The values currently stored in the cap_bit field are MTK_ETH_MUX_GDM1_TO_GMAC1_ESW: BIT_ULL(18) | BIT_ULL(5) MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY: BIT_ULL(19) | BIT_ULL(5) | BIT_ULL(6) MTK_ETH_MUX_U3_GMAC2_TO_QPHY: BIT_ULL(20) | BIT_ULL(5) | BIT_ULL(6) MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII: BIT_ULL(20) | BIT_ULL(5) | BIT_ULL(7) MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII: BIT_ULL(21) | BIT_ULL(5) While all those values are currently still within 32-bit boundaries, the addition of new capabilities of MT7988 as well as future SoC's like MT7987 will exceed them. Also, the use of a 32-bit 'int' type to store the result of a BIT_ULL(...) is misleading. Signed-off-by: Bo-Cun Chen Signed-off-by: Daniel Golle Reviewed-by: Simon Horman Link: https://patch.msgid.link/ded98b0d716c3203017a7a92151516ec2bf1abee.1745369249.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski

net: ethernet: mtk_eth_soc: add basic support for MT7988 SoC

2023-07-27T05:05:10Z

Introduce support for ethernet chip available in MT7988 SoC to mtk_eth_soc driver. As a first step support only the first GMAC which is hard-wired to the internal DSA switch having 4 built-in gigabit Ethernet PHYs. Signed-off-by: Lorenzo Bianconi Signed-off-by: Daniel Golle Link: https://lore.kernel.org/r/25c8377095b95d186872eeda7aa055da83e8f0ca.1690246605.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski

net: ethernet: mtk_eth_soc: convert caps in mtk_soc_data struct to u64

2023-07-27T05:05:10Z

This is a preliminary patch to introduce support for MT7988 SoC. Signed-off-by: Lorenzo Bianconi Signed-off-by: Daniel Golle Link: https://lore.kernel.org/r/9499ac3670b2fc5b444404b84e8a4a169beabbf2.1690246066.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski

net: ethernet: mtk_eth_soc: add support for MT7981 SoC

2023-03-21T02:47:59Z

The MediaTek MT7981 SoC comes with two 1G/2.5G SGMII ports, just like MT7986. In addition MT7981 is equipped with a built-in 1000Base-T PHY which can be used with GMAC1. As many MT7981 boards make use of inverting SGMII signal polarity, add new device-tree attribute 'mediatek,pn_swap' to support them. Signed-off-by: Daniel Golle Signed-off-by: Jakub Kicinski

net: mtk_eth: simplify the mediatek code return expression

2020-12-15T01:51:26Z

Simplify the return expression at mtk_eth_path.c file, simplify this all. Signed-off-by: Zheng Yongjun Link: https://lore.kernel.org/r/20201211083801.1632-1-zhengyongjun3@huawei.com Signed-off-by: Jakub Kicinski

net: mediatek: simplify the return expression of mtk_gmac_sgmii_path_setup()

2020-12-10T21:02:16Z

Simplify the return expression. Signed-off-by: Zheng Yongjun Signed-off-by: David S. Miller

net: mediatek: remove unneeded semicolon

2019-10-28T23:36:24Z

remove unneeded semicolon. Signed-off-by: YueHaibing Signed-off-by: David S. Miller

net: ethernet: mediatek: Re-add support SGMII

2019-08-28T03:19:27Z

* Re-add SGMII support but now with PHYLINK API support So the SGMII changes are more clear * Move SGMII block setup from mtk_gmac_sgmii_path_setup() to mtk_mac_config() * Merge mtk_setup_hw_path() into mtk_mac_config() * Remove mediatek,physpeed property, fixed-link supports now any speed so speed = <2500>; is now valid with PHYLINK * Demagic SGMII register values * Use phylink state to setup fixed-link mode Signed-off-by: René van Dorst Signed-off-by: David S. Miller

net: ethernet: mediatek: Add MT7628/88 SoC support

2019-08-18T21:15:51Z

This patch adds support for the MediaTek MT7628/88 SoCs to the common MediaTek ethernet driver. Some minor changes are needed for this and a bigger change, as the MT7628 does not support QDMA (only PDMA). Signed-off-by: Stefan Roese Cc: René van Dorst Cc: Daniel Golle Cc: Sean Wang Cc: John Crispin Signed-off-by: David S. Miller