<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c, branch linux-4.3.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.3.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.3.y'/>
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<updated>2015-09-01T23:40:19Z</updated>
<entry>
<title>ixgbe: add new function to check for management presence</title>
<updated>2015-09-01T23:40:19Z</updated>
<author>
<name>Don Skidmore</name>
<email>donald.c.skidmore@intel.com</email>
</author>
<published>2015-06-11T00:05:02Z</published>
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<id>urn:sha1:bd8069ace513dd2741bc7177eeebc9a392451db1</id>
<content type='text'>
This patch adds a support function that will indicate for the
existence of management FW.

Signed-off-by: Donald C Skidmore &lt;donald.c.skidmore@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>ixgbe: fix bug in not clearing counters for X550 devices</title>
<updated>2015-06-10T00:30:05Z</updated>
<author>
<name>Don Skidmore</name>
<email>donald.c.skidmore@intel.com</email>
</author>
<published>2015-06-10T00:00:05Z</published>
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<id>urn:sha1:e87ce1cd89b527eb963bfc9654206d83661f0fdd</id>
<content type='text'>
This check was missed in when this new MAC type was added.  Since
these counts can be incremented for X550 we need to clear them.

Signed-off-by: Don Skidmore &lt;donald.c.skidmore@intel.com&gt;
Tested-by: Krishneil Singh &lt;krishneil.k.singh@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>ixgbe: add support for WoL and autoneg FC for some X550 devices</title>
<updated>2015-06-10T00:20:51Z</updated>
<author>
<name>Don Skidmore</name>
<email>donald.c.skidmore@intel.com</email>
</author>
<published>2015-06-09T23:00:17Z</published>
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<id>urn:sha1:df8c26fdc6605638c6aaa3d6b62e8a5628f98edc</id>
<content type='text'>
These Device ID could support both WoL and autoneg flow control. In
the case of WoL this is indicated by the eeprom.  This patch enables
these devices this support.

Signed-off-by: Don Skidmore &lt;donald.c.skidmore@intel.com&gt;
Tested-by: Krishneil Singh &lt;krishneil.k.singh@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>ixgbe: add array of MAC type dependent values</title>
<updated>2015-06-10T00:15:01Z</updated>
<author>
<name>Don Skidmore</name>
<email>donald.c.skidmore@intel.com</email>
</author>
<published>2015-06-10T00:15:01Z</published>
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<id>urn:sha1:9a900ecaac65ecc487a8a223df80fe0f09d18080</id>
<content type='text'>
Some of the register addresses and format where unfortunately changed
between MAC types. To get around this we add a const u32 *mvals pointer
to the ixgbe_hw struct to point to an array of mac-type-dependent
values.  These can include register offsets, masks, whatever can be in
a u32. When the ixgbe_hw struct is initialized, a pointer to the
appropriate array must be set.

Signed-off-by: Don Skidmore &lt;donald.c.skidmore@intel.com&gt;
Tested-by: Phil Schmitt &lt;phillip.j.schmitt@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>ixgbe: enable relaxed ordering for SPARC</title>
<updated>2015-03-13T22:40:41Z</updated>
<author>
<name>Jeff Kirsher</name>
<email>jeffrey.t.kirsher@intel.com</email>
</author>
<published>2015-03-13T21:04:35Z</published>
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<id>urn:sha1:887012e80aeaf36968456e8085abf41aee907707</id>
<content type='text'>
This patch makes sure that relaxed ordering is not disabled when
on SPARC, where it helps with performance.

CC: &lt;kernel-team@fb.com&gt;
CC: Sowmini Varadhan &lt;sowmini.varadhan@oracle.com&gt;
Reported-by: Sowmini Varadhan &lt;sowmini.varadhan@oracle.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
Tested-by: Phil Schmitt &lt;phillip.j.schmitt@intel.com&gt;
</content>
</entry>
<entry>
<title>ixgbe: add new wrapper for X550 support</title>
<updated>2015-03-13T20:54:30Z</updated>
<author>
<name>Don Skidmore</name>
<email>donald.c.skidmore@intel.com</email>
</author>
<published>2015-03-13T20:54:30Z</published>
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<id>urn:sha1:1f9ac57cad1448793844dcfe5b5e00407f2c6490</id>
<content type='text'>
For the X550 mac type we have to do additional steps around
enabling/disabling Rx.  This patch will add a layer of indirection
around these support functions to enable this.

CC: &lt;kernel-team@fb.com&gt;
Signed-off-by: Don Skidmore &lt;donald.c.skidmore@intel.com&gt;
Tested-by: Phil Schmitt &lt;phillip.j.schmitt@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>ixgbe: Add X550 support function pointers</title>
<updated>2014-12-05T17:13:07Z</updated>
<author>
<name>Don Skidmore</name>
<email>donald.c.skidmore@intel.com</email>
</author>
<published>2014-12-05T03:59:50Z</published>
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<id>urn:sha1:6a14ee0cfb1973520f9843f4896443f940a6a2c9</id>
<content type='text'>
This patch extends the function pointer structure to include the new
X550 class MAC types. This creates a new file ixgbe_x550.c that contains
all of the new methods.  Because of similarities to the X540 part in
some cases we just use it's methods where they can be used without any
modification.  These exported functions are now defined in the new
ixgbe_x540.h file.

Signed-off-by: Don Skidmore &lt;donald.c.skidmore@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>ixgbe: cleanup checksum to allow error results</title>
<updated>2014-12-05T17:13:07Z</updated>
<author>
<name>Don Skidmore</name>
<email>donald.c.skidmore@intel.com</email>
</author>
<published>2014-11-29T05:22:48Z</published>
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<id>urn:sha1:735c35afed09f07c57abc9171f40202ec5f1630f</id>
<content type='text'>
Currently the shared code checksum calculation function only
returns a u16 and cannot return an error code. Unfortunately
a variety of errors can happen that completely prevent the
calculation of a checksum. So, change the function return value
from a u16 to an s32 and return a negative value on error, or the
positive checksum value when there is no error.

Signed-off-by: Don Skidmore &lt;donald.c.skidmore@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>ixgbe: Add x550 SW/FW semaphore support</title>
<updated>2014-12-05T17:13:06Z</updated>
<author>
<name>Don Skidmore</name>
<email>donald.c.skidmore@intel.com</email>
</author>
<published>2014-11-29T05:22:37Z</published>
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<id>urn:sha1:030eaece2d77aaf952396dea016c6e9409386aa2</id>
<content type='text'>
The X550 hardware will use more bits in the mask, so change
the prototypes to match.  This larger mask will require changes
in callers which use the higher bits. Likewise since X550 will
use different semaphore mask values and will use the lan_id
value.  So save these values in the ixgbe_phy_info struct.

Signed-off-by: Don Skidmore &lt;donald.c.skidmore@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>ixgbe: Add timeout parameter to ixgbe_host_interface_command</title>
<updated>2014-12-05T17:13:06Z</updated>
<author>
<name>Don Skidmore</name>
<email>donald.c.skidmore@intel.com</email>
</author>
<published>2014-11-29T05:22:32Z</published>
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<id>urn:sha1:b48e4aa3e5ff6d2849f10f6619b591d8d1b0f2fd</id>
<content type='text'>
Since on X550 we use host interface commands to read,write and erase
some commands require more time to complete. So this adds a timeout
parameter to ixgbe_host_interface_command as wells as a return_data
parameter allowing us to return with any data.

Signed-off-by: Don Skidmore &lt;donald.c.skidmore@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
</feed>
