<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/net/ethernet/intel/ice/ice_flex_pipe.h, branch linux-6.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y</id>
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<updated>2022-03-11T16:28:27Z</updated>
<entry>
<title>ice: Fix FV offset searching</title>
<updated>2022-03-11T16:28:27Z</updated>
<author>
<name>Michal Swiatkowski</name>
<email>michal.swiatkowski@linux.intel.com</email>
</author>
<published>2022-03-04T16:40:47Z</published>
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<id>urn:sha1:e5dd661b8bb3751bfe65f4da45b4dec2bfe6d3b8</id>
<content type='text'>
Checking only protocol ids while searching for correct FVs can lead to a
situation, when incorrect FV will be added to the list. Incorrect means
that FV has correct protocol id but incorrect offset.

Call ice_get_sw_fv_list with ice_prot_lkup_ext struct which contains all
protocol ids with offsets.

With this modification allocating and collecting protocol ids list is
not longer needed.

Signed-off-by: Michal Swiatkowski &lt;michal.swiatkowski@linux.intel.com&gt;
Tested-by: Sandeep Penigalapati &lt;sandeep.penigalapati@intel.com&gt;
Signed-off-by: Tony Nguyen &lt;anthony.l.nguyen@intel.com&gt;
</content>
</entry>
<entry>
<title>ice: Support configuring the device to Double VLAN Mode</title>
<updated>2022-02-09T17:24:45Z</updated>
<author>
<name>Brett Creeley</name>
<email>brett.creeley@intel.com</email>
</author>
<published>2021-12-02T16:38:49Z</published>
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<id>urn:sha1:a1ffafb0b4a4fb74d41112b71a02c39ece0fe2d8</id>
<content type='text'>
In order to support configuring the device in Double VLAN Mode (DVM),
the DDP and FW have to support DVM. If both support DVM, the PF that
downloads the package needs to update the default recipes, set the
VLAN mode, and update boost TCAM entries.

To support updating the default recipes in DVM, add support for
updating an existing switch recipe's lkup_idx and mask. This is done
by first calling the get recipe AQ (0x0292) with the desired recipe
ID. Then, if that is successful update one of the lookup indices
(lkup_idx) and its associated mask if the mask is valid otherwise
the already existing mask will be used.

The VLAN mode of the device has to be configured while the global
configuration lock is held while downloading the DDP, specifically after
the DDP has been downloaded. If supported, the device will default to
DVM.

Co-developed-by: Dan Nowlin &lt;dan.nowlin@intel.com&gt;
Signed-off-by: Dan Nowlin &lt;dan.nowlin@intel.com&gt;
Signed-off-by: Brett Creeley &lt;brett.creeley@intel.com&gt;
Tested-by: Gurucharan G &lt;gurucharanx.g@intel.com&gt;
Signed-off-by: Tony Nguyen &lt;anthony.l.nguyen@intel.com&gt;
</content>
</entry>
<entry>
<title>ice: Cleanup after ice_status removal</title>
<updated>2021-12-14T18:19:13Z</updated>
<author>
<name>Tony Nguyen</name>
<email>anthony.l.nguyen@intel.com</email>
</author>
<published>2021-10-07T22:59:03Z</published>
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<id>urn:sha1:5518ac2a64423f226e922b6719cf0eb62c31e141</id>
<content type='text'>
Clean up code after changing ice_status to int. Rearrange to fix reverse
Christmas tree and pull lines up where applicable.

Signed-off-by: Tony Nguyen &lt;anthony.l.nguyen@intel.com&gt;
Tested-by: Gurucharan G &lt;gurucharanx.g@intel.com&gt;
</content>
</entry>
<entry>
<title>ice: Use int for ice_status</title>
<updated>2021-12-14T18:19:13Z</updated>
<author>
<name>Tony Nguyen</name>
<email>anthony.l.nguyen@intel.com</email>
</author>
<published>2021-10-07T22:56:57Z</published>
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<id>urn:sha1:5e24d5984c805c644de8bf5217a820e22e28318c</id>
<content type='text'>
To prepare for removal of ice_status, change the variables from
ice_status to int. This eases the transition when values are changed to
return standard int error codes over enum ice_status.

Signed-off-by: Tony Nguyen &lt;anthony.l.nguyen@intel.com&gt;
Tested-by: Gurucharan G &lt;gurucharanx.g@intel.com&gt;
</content>
</entry>
<entry>
<title>ice: Refactor status flow for DDP load</title>
<updated>2021-12-14T18:19:13Z</updated>
<author>
<name>Wojciech Drewek</name>
<email>wojciech.drewek@intel.com</email>
</author>
<published>2021-10-07T22:54:37Z</published>
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<id>urn:sha1:247dd97d713c73b16e87db238964625ffdbb8d02</id>
<content type='text'>
Before this change, final state of the DDP pkg load process was
dependent on many variables such as: ice_status, pkg version,
ice_aq_err. The last one had be stored in hw-&gt;pkg_dwnld_status.
It was impossible to conclude this state just from ice_status, that's
why logging process of DDP pkg load in the caller was a little bit
complicated.

With this patch new status enum is introduced - ice_ddp_state.
It covers all the possible final states of the loading process.
What's tricky for ice_ddp_state is that not only
ICE_DDP_PKG_SUCCESS(=0) means that load was successful. Actually
three states mean that:
 - ICE_DDP_PKG_SUCCESS
 - ICE_DDP_PKG_SAME_VERSION_ALREADY_LOADED
 - ICE_DDP_PKG_COMPATIBLE_ALREADY_LOADED
ice_is_init_pkg_successful can tell that information.

One ddp_state should not be used outside of ice_init_pkg which is
ICE_DDP_PKG_ALREADY_LOADED. It is more generic, it is used in
ice_dwnld_cfg_bufs to see if pkg is already loaded. At this point
we can't use one of the specific one (SAME_VERSION, COMPATIBLE,
NOT_SUPPORTED) because we don't have information on the package
currently loaded in HW (we are before calling ice_get_pkg_info).

We can get rid of hw-&gt;pkg_dwnld_status because we are immediately
mapping aq errors to ice_ddp_state in ice_dwnld_cfg_bufs.

Other errors like ICE_ERR_NO_MEMORY, ICE_ERR_PARAM are mapped the
generic ICE_DDP_PKG_ERR.

Suggested-by: Jacob Keller &lt;jacob.e.keller@intel.com&gt;
Signed-off-by: Wojciech Drewek &lt;wojciech.drewek@intel.com&gt;
Tested-by: Tony Brelinski &lt;tony.brelinski@intel.com&gt;
Signed-off-by: Tony Nguyen &lt;anthony.l.nguyen@intel.com&gt;
</content>
</entry>
<entry>
<title>ice: Add package PTYPE enable information</title>
<updated>2021-12-14T16:06:47Z</updated>
<author>
<name>Haiyue Wang</name>
<email>haiyue.wang@intel.com</email>
</author>
<published>2021-07-16T22:16:42Z</published>
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<id>urn:sha1:8818b95409d8e68da3c2ec3e407b617d9294cf37</id>
<content type='text'>
Scan the 'Marker Ptype TCAM' section to retrieve the Rx parser PTYPE
enable information from the current package.

Signed-off-by: Haiyue Wang &lt;haiyue.wang@intel.com&gt;
Tested-by: Tony Brelinski &lt;tony.brelinski@intel.com&gt;
Signed-off-by: Tony Nguyen &lt;anthony.l.nguyen@intel.com&gt;
</content>
</entry>
<entry>
<title>ice: fix adding different tunnels</title>
<updated>2021-12-07T21:21:01Z</updated>
<author>
<name>Michal Swiatkowski</name>
<email>michal.swiatkowski@linux.intel.com</email>
</author>
<published>2021-11-22T15:39:25Z</published>
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<id>urn:sha1:de6acd1cdd4d38823b7f4adae82e8a7d62993354</id>
<content type='text'>
Adding filters with the same values inside for VXLAN and Geneve causes HW
error, because it looks exactly the same. To choose between different
type of tunnels new recipe is needed. Add storing tunnel types in
creating recipes function and start checking it in finding function.

Change getting open tunnels function to return port on correct tunnel
type. This is needed to copy correct port to dummy packet.

Block user from adding enc_dst_port via tc flower, because VXLAN and
Geneve filters can be created only with destination port which was
previously opened.

Fixes: 8b032a55c1bd5 ("ice: low level support for tunnels")
Signed-off-by: Michal Swiatkowski &lt;michal.swiatkowski@linux.intel.com&gt;
Tested-by: Sandeep Penigalapati &lt;sandeep.penigalapati@intel.com&gt;
Signed-off-by: Tony Nguyen &lt;anthony.l.nguyen@intel.com&gt;
</content>
</entry>
<entry>
<title>ice: create advanced switch recipe</title>
<updated>2021-10-11T15:38:27Z</updated>
<author>
<name>Dan Nowlin</name>
<email>dan.nowlin@intel.com</email>
</author>
<published>2021-08-06T08:49:00Z</published>
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<id>urn:sha1:fd2a6b71e3008360c7b26a3d7002fe03dbdc61fd</id>
<content type='text'>
These changes introduce code for creating advanced recipes for the
switch in hardware.

There are a couple of recipes already defined in the HW. They apply to
matching on basic protocol headers, like MAC, VLAN, MACVLAN,
ethertype or direction (promiscuous), etc.. If the user wants to match on
other protocol headers (eg. ip address, src/dst port etc.) or different
variation of already supported protocols, there is a need to create
new, more complex recipe. That new recipe is referred as
'advanced recipe', and the filtering rule created on top of that recipe
is called 'advanced rule'.

One recipe can have up to 5 words, but the first word is always reserved
for match on switch id, so the driver can define up to 4 words for one
recipe. To support recipes with more words up to 5 recipes can be
chained, so 20 words can be programmed for look up.

Input for adding recipe function is a list of protocols to support. Based
on this list correct profile is being chosen. Correct profile means
that it contains all protocol types from a list. Each profile have up to
48 field vector words and each of this word have protocol id and offset.
These two fields need to match with input data for adding recipe
function. If the correct profile can't be found the function returns an
error.

The next step after finding the correct profile is grouping words into
groups. One group can have up to 4 words. This is done to simplify
sending recipes to HW (because recipe also can have up to 4 words).

In case of chaining (so when look up consists of more than 4 words) last
recipe will always have results from the previous recipes used as words.

A recipe to profile map is used to store information about which profile
is associate with this recipe. This map is an array of 64 elements (max
number of recipes) and each element is a 256 bits bitmap (max number of
profiles)

Profile to recipe map is used to store information about which recipe is
associate with this profile. This map is an array of 256 elements (max
number of profiles) and each element is a 64 bits bitmap (max number of
recipes)

Signed-off-by: Dan Nowlin &lt;dan.nowlin@intel.com&gt;
Signed-off-by: Wojciech Drewek &lt;wojciech.drewek@intel.com&gt;
Tested-by: Sandeep Penigalapati &lt;sandeep.penigalapati@intel.com&gt;
Signed-off-by: Tony Nguyen &lt;anthony.l.nguyen@intel.com&gt;
</content>
</entry>
<entry>
<title>ice: manage profiles and field vectors</title>
<updated>2021-10-11T15:36:25Z</updated>
<author>
<name>Dan Nowlin</name>
<email>dan.nowlin@intel.com</email>
</author>
<published>2021-08-06T08:48:59Z</published>
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<id>urn:sha1:450052a4142c6bf2ec4ba6a54d833a575482a032</id>
<content type='text'>
Implement functions to manage profiles and field vectors in hardware.

In hardware, there are up to 256 profiles and each of these profiles can
have 48 field vector words. Each field vector word is described by
protocol id and offset in the packet. To add a new recipe all used
profiles need to be searched. If the profile contains all required
protocol ids and offsets from the recipe it can be used. The driver has
to add this profile to recipe association to tell hardware that newly
added recipe is going to be associated with this profile.

The amount of used profiles depend on the package. To avoid searching
across not used profile, max profile id value is calculated at init flow.
The profile is considered as unused when all field vector words in the
profile are invalid (protocol id 0xff and offset 0x1ff).

Profiles are read from the package section ICE_SID_FLD_VEC_SW. Empty
field vector words can be used for recipe results. Store all unused field
vector words in prof_res_bm. It is a 256 elements array (max number of
profiles) each element is a 48 bit bitmap (max number of field vector
words).

For now, support only non-tunnel profiles type.

Co-developed-by: Grishma Kotecha &lt;grishma.kotecha@intel.com&gt;
Signed-off-by: Grishma Kotecha &lt;grishma.kotecha@intel.com&gt;
Signed-off-by: Dan Nowlin &lt;dan.nowlin@intel.com&gt;
Signed-off-by: Wojciech Drewek &lt;wojciech.drewek@intel.com&gt;
Tested-by: Sandeep Penigalapati &lt;sandeep.penigalapati@intel.com&gt;
Signed-off-by: Tony Nguyen &lt;anthony.l.nguyen@intel.com&gt;
</content>
</entry>
<entry>
<title>ice: Support to separate GTP-U uplink and downlink</title>
<updated>2021-03-22T18:32:12Z</updated>
<author>
<name>Qi Zhang</name>
<email>qi.z.zhang@intel.com</email>
</author>
<published>2021-03-09T03:08:01Z</published>
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<id>urn:sha1:cbad5db88aaf42ca3855c5c485fb5a900caaadc5</id>
<content type='text'>
To apply different input set for GTP-U packet with or without extend
header as well as GTP-U uplink and downlink, we need to add TCAM mask
matching capability. This allows comprehending different PTYPE
attributes by examining flags from the parser. Using this method,
different profiles can be used by examining flag values from the parser.

Signed-off-by: Dan Nowlin &lt;dan.nowlin@intel.com&gt;
Signed-off-by: Qi Zhang &lt;qi.z.zhang@intel.com&gt;
Tested-by: Chen Bo &lt;BoX.C.Chen@intel.com&gt;
Signed-off-by: Tony Nguyen &lt;anthony.l.nguyen@intel.com&gt;
</content>
</entry>
</feed>
