<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/net/ethernet/intel/ice/ice_common.h, branch linux-6.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.2.y'/>
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<updated>2022-11-23T16:59:42Z</updated>
<entry>
<title>ice: Remove and replace ice speed defines with ethtool.h versions</title>
<updated>2022-11-23T16:59:42Z</updated>
<author>
<name>Brett Creeley</name>
<email>brett.creeley@intel.com</email>
</author>
<published>2022-10-31T17:09:12Z</published>
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<id>urn:sha1:1d0e28a9be1fa02309b16dd68db31b4c8e716912</id>
<content type='text'>
The driver is currently using ICE_LINK_SPEED_* defines that mirror what
ethtool.h defines, with one exception ICE_LINK_SPEED_UNKNOWN.

This issue is fixed by the following changes:

1. replace ICE_LINK_SPEED_UNKNOWN with 0 because SPEED_UNKNOWN in
   ethtool.h is "-1" and that doesn't match the driver's expected behavior
2. transform ICE_LINK_SPEED_*MBPS to SPEED_* using static tables and
   fls()-1 to convert from BIT() to an index in a table.

Suggested-by: Alexander Lobakin &lt;alexandr.lobakin@intel.com&gt;
Signed-off-by: Brett Creeley &lt;brett.creeley@intel.com&gt;
Co-developed-by: Jesse Brandeburg &lt;jesse.brandeburg@intel.com&gt;
Signed-off-by: Jesse Brandeburg &lt;jesse.brandeburg@intel.com&gt;
Tested-by: Gurucharan G &lt;gurucharanx.g@intel.com&gt; (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen &lt;anthony.l.nguyen@intel.com&gt;
</content>
</entry>
<entry>
<title>ice: Add port option admin queue commands</title>
<updated>2022-08-24T15:45:53Z</updated>
<author>
<name>Anatolii Gerasymenko</name>
<email>anatolii.gerasymenko@intel.com</email>
</author>
<published>2022-08-11T13:05:33Z</published>
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<id>urn:sha1:781f15eac0d2035828558d7e5ab2779b151b2362</id>
<content type='text'>
Implement support for Get/Set Port Options admin queue commands
(0x06EA/0x06EB). These firmware commands allow the driver to change port
specific options and will be used in the next patch.

Co-developed-by: Lev Faerman &lt;lev.faerman@intel.com&gt;
Signed-off-by: Lev Faerman &lt;lev.faerman@intel.com&gt;
Co-developed-by: Damian Milosek &lt;damian.milosek@intel.com&gt;
Signed-off-by: Damian Milosek &lt;damian.milosek@intel.com&gt;
Co-developed-by: Jesse Brandeburg &lt;jesse.brandeburg@intel.com&gt;
Signed-off-by: Jesse Brandeburg &lt;jesse.brandeburg@intel.com&gt;
Signed-off-by: Anatolii Gerasymenko &lt;anatolii.gerasymenko@intel.com&gt;
Tested-by: Gurucharan &lt;gurucharanx.g@intel.com&gt; (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen &lt;anthony.l.nguyen@intel.com&gt;
</content>
</entry>
<entry>
<title>ice: Allow 100M speeds for some devices</title>
<updated>2022-08-18T15:23:44Z</updated>
<author>
<name>Anirudh Venkataramanan</name>
<email>anirudh.venkataramanan@intel.com</email>
</author>
<published>2022-08-12T14:36:07Z</published>
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<id>urn:sha1:39ed02a4ba5270ee3e0556ec08ceac6e76a1dfc4</id>
<content type='text'>
For certain devices, 100M speeds are supported. Do not mask off
100M speed for these devices.

Signed-off-by: Anirudh Venkataramanan &lt;anirudh.venkataramanan@intel.com&gt;
Co-developed-by: Chinh T Cao &lt;chinh.t.cao@intel.com&gt;
Signed-off-by: Chinh T Cao &lt;chinh.t.cao@intel.com&gt;
Signed-off-by: Mikael Barsehyan &lt;mikael.barsehyan@intel.com&gt;
Tested-by: Kavya AV &lt;kavyax.av@intel.com&gt; (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen &lt;anthony.l.nguyen@intel.com&gt;
</content>
</entry>
<entry>
<title>ice: add i2c write command</title>
<updated>2022-07-21T18:22:45Z</updated>
<author>
<name>Karol Kolacinski</name>
<email>karol.kolacinski@intel.com</email>
</author>
<published>2022-06-24T15:22:02Z</published>
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<id>urn:sha1:fcf9b695a554dd8b74863ea59b639515f95b10ee</id>
<content type='text'>
Add the possibility to write to connected i2c devices using the AQ
command. FW may reject the write if the device is not on allowlist.

Signed-off-by: Karol Kolacinski &lt;karol.kolacinski@intel.com&gt;
Tested-by: Gurucharan &lt;gurucharanx.g@intel.com&gt; (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen &lt;anthony.l.nguyen@intel.com&gt;
</content>
</entry>
<entry>
<title>ice: remove circular header dependencies on ice.h</title>
<updated>2022-03-15T00:22:58Z</updated>
<author>
<name>Jacob Keller</name>
<email>jacob.e.keller@intel.com</email>
</author>
<published>2022-02-23T00:26:50Z</published>
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<id>urn:sha1:649c87c6ff52efccf7832a690c0959e012ecce73</id>
<content type='text'>
Several headers in the ice driver include ice.h even though they are
themselves included by that header. The most notable of these is
ice_common.h, but several other headers also do this.

Such a recursive inclusion is problematic as it forces headers to be
included in a strict order, otherwise compilation errors can result. The
circular inclusions do not trigger an endless loop due to standard
header inclusion guards, however other errors can occur.

For example, ice_flow.h defines ice_rss_hash_cfg, which is used by
ice_sriov.h as part of the definition of ice_vf_hash_ip_ctx.

ice_flow.h includes ice_acl.h, which includes ice_common.h, and which
finally includes ice.h. Since ice.h itself includes ice_sriov.h, this
creates a circular dependency.

The definition in ice_sriov.h requires things from ice_flow.h, but
ice_flow.h itself will lead to trying to load ice_sriov.h as part of its
process for expanding ice.h. The current code avoids this issue by
having an implicit dependency without the include of ice_flow.h.

If we were to fix that so that ice_sriov.h explicitly depends on
ice_flow.h the following pattern would occur:

  ice_flow.h -&gt; ice_acl.h -&gt; ice_common.h -&gt; ice.h -&gt; ice_sriov.h

At this point, during the expansion of, the header guard for ice_flow.h
is already set, so when ice_sriov.h attempts to load the ice_flow.h
header it is skipped. Then, we go on to begin including the rest of
ice_sriov.h, including structure definitions which depend on
ice_rss_hash_cfg. This produces a compiler warning because
ice_rss_hash_cfg hasn't yet been included. Remember, we're just at the
start of ice_flow.h!

If the order of headers is incorrect (ice_flow.h is not implicitly
loaded first in all files which include ice_sriov.h) then we get the
same failure.

Removing this recursive inclusion requires fixing a few cases where some
headers depended on the header inclusions from ice.h. In addition, a few
other changes are also required.

Most notably, ice_hw_to_dev is implemented as a macro in ice_osdep.h,
which is the likely reason that ice_common.h includes ice.h at all. This
macro implementation requires the full definition of ice_pf in order to
properly compile.

Fix this by moving it to a function declared in ice_main.c, so that we
do not require all files to depend on the layout of the ice_pf
structure.

Note that this change only fixes circular dependencies, but it does not
fully resolve all implicit dependencies where one header may depend on
the inclusion of another. I tried to fix as many of the implicit
dependencies as I noticed, but fixing them all requires a somewhat
tedious analysis of each header and attempting to compile it separately.

Signed-off-by: Jacob Keller &lt;jacob.e.keller@intel.com&gt;
Tested-by: Gurucharan G &lt;gurucharanx.g@intel.com&gt; (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen &lt;anthony.l.nguyen@intel.com&gt;
</content>
</entry>
<entry>
<title>ice: add TTY for GNSS module for E810T device</title>
<updated>2022-03-03T14:11:00Z</updated>
<author>
<name>Karol Kolacinski</name>
<email>karol.kolacinski@intel.com</email>
</author>
<published>2022-03-01T18:38:03Z</published>
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<id>urn:sha1:43113ff73453c231af2c8e700cb4ff8bca97cff6</id>
<content type='text'>
Add a new ice_gnss.c file for holding the basic GNSS module functions.
If the device supports GNSS module, call the new ice_gnss_init and
ice_gnss_release functions where appropriate.

Implement basic functionality for reading the data from GNSS module
using TTY device.

Add I2C read AQ command. It is now required for controlling the external
physical connectors via external I2C port expander on E810-T adapters.

Future changes will introduce write functionality.

Signed-off-by: Karol Kolacinski &lt;karol.kolacinski@intel.com&gt;
Signed-off-by: Sudhansu Sekhar Mishra &lt;sudhansu.mishra@intel.com&gt;
Tested-by: Sunitha Mekala &lt;sunithax.d.mekala@intel.com&gt;
Signed-off-by: Tony Nguyen &lt;anthony.l.nguyen@intel.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>ice: Support configuring the device to Double VLAN Mode</title>
<updated>2022-02-09T17:24:45Z</updated>
<author>
<name>Brett Creeley</name>
<email>brett.creeley@intel.com</email>
</author>
<published>2021-12-02T16:38:49Z</published>
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<id>urn:sha1:a1ffafb0b4a4fb74d41112b71a02c39ece0fe2d8</id>
<content type='text'>
In order to support configuring the device in Double VLAN Mode (DVM),
the DDP and FW have to support DVM. If both support DVM, the PF that
downloads the package needs to update the default recipes, set the
VLAN mode, and update boost TCAM entries.

To support updating the default recipes in DVM, add support for
updating an existing switch recipe's lkup_idx and mask. This is done
by first calling the get recipe AQ (0x0292) with the desired recipe
ID. Then, if that is successful update one of the lookup indices
(lkup_idx) and its associated mask if the mask is valid otherwise
the already existing mask will be used.

The VLAN mode of the device has to be configured while the global
configuration lock is held while downloading the DDP, specifically after
the DDP has been downloaded. If supported, the device will default to
DVM.

Co-developed-by: Dan Nowlin &lt;dan.nowlin@intel.com&gt;
Signed-off-by: Dan Nowlin &lt;dan.nowlin@intel.com&gt;
Signed-off-by: Brett Creeley &lt;brett.creeley@intel.com&gt;
Tested-by: Gurucharan G &lt;gurucharanx.g@intel.com&gt;
Signed-off-by: Tony Nguyen &lt;anthony.l.nguyen@intel.com&gt;
</content>
</entry>
<entry>
<title>ice: Use int for ice_status</title>
<updated>2021-12-14T18:19:13Z</updated>
<author>
<name>Tony Nguyen</name>
<email>anthony.l.nguyen@intel.com</email>
</author>
<published>2021-10-07T22:56:57Z</published>
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<id>urn:sha1:5e24d5984c805c644de8bf5217a820e22e28318c</id>
<content type='text'>
To prepare for removal of ice_status, change the variables from
ice_status to int. This eases the transition when values are changed to
return standard int error codes over enum ice_status.

Signed-off-by: Tony Nguyen &lt;anthony.l.nguyen@intel.com&gt;
Tested-by: Gurucharan G &lt;gurucharanx.g@intel.com&gt;
</content>
</entry>
<entry>
<title>ice: Add support for SMA control multiplexer</title>
<updated>2021-10-14T14:37:30Z</updated>
<author>
<name>Maciej Machnikowski</name>
<email>maciej.machnikowski@intel.com</email>
</author>
<published>2021-08-17T11:09:17Z</published>
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<id>urn:sha1:885fe6932a1190cc0a949c3da52223c54f6fe7a8</id>
<content type='text'>
E810-T adapters have two external bidirectional SMA connectors and two
internal unidirectional U.FL connectors. Multiplexing between U.FL and
SMA and SMA direction is controlled using the PCA9575 expander.

Add support for the PCA9575 detection and control of the respective pins
of the SMA/U.FL multiplexer using the GPIO AQ API.

Signed-off-by: Maciej Machnikowski &lt;maciej.machnikowski@intel.com&gt;
Tested-by: Sunitha Mekala &lt;sunithax.d.mekala@intel.com&gt;
Signed-off-by: Tony Nguyen &lt;anthony.l.nguyen@intel.com&gt;
</content>
</entry>
<entry>
<title>ice: Implement functions for reading and setting GPIO pins</title>
<updated>2021-10-14T14:37:30Z</updated>
<author>
<name>Maciej Machnikowski</name>
<email>maciej.machnikowski@intel.com</email>
</author>
<published>2021-08-17T11:09:16Z</published>
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<id>urn:sha1:3bb6324b3dcbf30a99fea0bad9fe8941de4b75fb</id>
<content type='text'>
Implement ice_aq_get_gpio and ice_aq_set_gpio for reading and changing
the state of GPIO pins described in the topology.

Signed-off-by: Maciej Machnikowski &lt;maciej.machnikowski@intel.com&gt;
Tested-by: Sunitha Mekala &lt;sunithax.d.mekala@intel.com&gt;
Signed-off-by: Tony Nguyen &lt;anthony.l.nguyen@intel.com&gt;
</content>
</entry>
</feed>
