<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/net/ethernet/intel/e1000e, branch linux-4.3.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.3.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.3.y'/>
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<updated>2015-08-18T21:06:06Z</updated>
<entry>
<title>e1000e: Modify Tx/Rx configurations to avoid null pointer dereferences in e1000_open</title>
<updated>2015-08-18T21:06:06Z</updated>
<author>
<name>Jia-Ju Bai</name>
<email>baijiaju1990@163.com</email>
</author>
<published>2015-08-05T10:16:10Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=0845d45e900cad5f7f855a7a6a21c33477800b1f'/>
<id>urn:sha1:0845d45e900cad5f7f855a7a6a21c33477800b1f</id>
<content type='text'>
When e1000e_setup_rx_resources is failed in e1000_open,
e1000e_free_tx_resources in "err_setup_rx" segment is executed.
"writel(0, tx_ring-&gt;head)" statement in e1000_clean_tx_ring
in e1000e_free_tx_resources will cause a null poonter dereference(crash),
because "tx_ring-&gt;head" is only assigned in e1000_configure_tx
in e1000_configure, but it is after e1000e_setup_rx_resources.

This patch moves head/tail register writing to e1000_configure_tx/rx,
which can fix this problem. It is inspired by igb_configure_tx_ring
in the igb driver.

Specially, thank Alexander Duyck for his valuable suggestion.

Signed-off-by: Jia-Ju Bai &lt;baijiaju1990@163.com&gt;
Tested-by: Aaron Brown &lt;aaron.f.brown@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>e1000e: Increase driver version number</title>
<updated>2015-08-05T23:54:04Z</updated>
<author>
<name>Raanan Avargil</name>
<email>raanan.avargil@intel.com</email>
</author>
<published>2015-07-19T13:33:21Z</published>
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<id>urn:sha1:d2d7d4e4a60f1aeefb38d7a0bede3742ddb76a68</id>
<content type='text'>
Signed-off-by: Raanan Avargil &lt;raanan.avargil@intel.com&gt;
Tested-by: Aaron Brown &lt;aaron.f.brown@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>e1000e: Fix tight loop implementation of systime read algorithm</title>
<updated>2015-08-05T23:53:48Z</updated>
<author>
<name>Raanan Avargil</name>
<email>raanan.avargil@intel.com</email>
</author>
<published>2015-07-19T13:33:20Z</published>
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<id>urn:sha1:37b12910dd11d9ab969f2c310dc9160b7f3e3405</id>
<content type='text'>
Change the algorithm. Read systimel twice and check for overflow.
If there was no overflow, use the first value.
If there was an overflow, read systimeh again and use the second
systimel value.

Signed-off-by: Raanan Avargil &lt;raanan.avargil@intel.com&gt;
Tested-by: Aaron Brown &lt;aaron.f.brown@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>e1000e: Fix incorrect ASPM locking</title>
<updated>2015-08-05T23:53:47Z</updated>
<author>
<name>Raanan Avargil</name>
<email>raanan.avargil@intel.com</email>
</author>
<published>2015-07-06T14:57:36Z</published>
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<id>urn:sha1:2758f9edb7bd5a06a2ecee83cc2ebaf8822a0cb5</id>
<content type='text'>
This patch fixes wrong locking usage.
In the context of slot reset, we should use lock.
And during resume, there is no need of lock.

Reported-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Signed-off-by: Raanan Avargil &lt;raanan.avargil@intel.com&gt;
Tested-by: Aaron Brown &lt;aaron.f.brown@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>e1000e: Cosmetic changes</title>
<updated>2015-08-05T23:53:47Z</updated>
<author>
<name>Raanan Avargil</name>
<email>raanan.avargil@intel.com</email>
</author>
<published>2015-07-06T13:58:54Z</published>
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<id>urn:sha1:d582891594104adeea89307ddd31b31bcf2d95fa</id>
<content type='text'>
1) Replace spaces with tab.
2) Move ich8lan related define to the proper context.

Signed-off-by: Raanan Avargil &lt;raanan.avargil@intel.com&gt;
Tested-by: Aaron Brown &lt;aaron.f.brown@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>e1000e: Fix EEE in Sx implementation</title>
<updated>2015-08-05T23:53:47Z</updated>
<author>
<name>Raanan Avargil</name>
<email>raanan.avargil@intel.com</email>
</author>
<published>2015-07-06T13:48:00Z</published>
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<id>urn:sha1:f5ac7445ebdbfa8cd2d90ef2a58b8f4455bcb664</id>
<content type='text'>
This patch implements the EEE in Sx code so that it only applies to parts
that support EEE in Sx (as opposed to all parts that support EEE).
It also uses the existing eee_advert and eee_lp_abiliity to set just the
bits (100/1000) that should be set.

Signed-off-by: Raanan Avargil &lt;raanan.avargil@intel.com&gt;
Tested-by: Aaron Brown &lt;aaron.f.brown@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>e1000e: Cleanup qos request in error handling of e1000_open</title>
<updated>2015-07-23T12:03:59Z</updated>
<author>
<name>Jia-Ju Bai</name>
<email>baijiaju1990@163.com</email>
</author>
<published>2015-06-04T13:07:27Z</published>
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<id>urn:sha1:7faae96421870ed990b0a84797c6b2377e81d079</id>
<content type='text'>
The driver lacks pm_qos_remove_request in error handling (err_req_irq) of
e1000_open, and qos request inserted by pm_qos_add_request is not removed.
This patch add pm_qos_remove_request in error handling to fix it.

Signed-off-by: Jia-Ju Bai &lt;baijiaju1990@163.com&gt;
Tested-by: Aaron Brown &lt;aaron.f.brown@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>e1000e: i219 - k1 workaround for LPT is not required for SPT</title>
<updated>2015-06-26T09:47:37Z</updated>
<author>
<name>Yanir Lubetkin</name>
<email>yanirx.lubetkin@intel.com</email>
</author>
<published>2015-06-09T22:16:03Z</published>
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<id>urn:sha1:352f8ead753402d6c0496cb83b902128925459eb</id>
<content type='text'>
In SPT hardware does not require this driver workaround.
Removed the conditional that caused K1 workaround execution on SPT.

Signed-off-by: Yanir Lubetkin &lt;yanirx.lubetkin@intel.com&gt;
Tested-by: Aaron Brown &lt;aaron.f.brown@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>e1000e: i219 - Increase minimum FIFO read/write min gap</title>
<updated>2015-06-26T09:45:50Z</updated>
<author>
<name>Yanir Lubetkin</name>
<email>yanirx.lubetkin@intel.com</email>
</author>
<published>2015-06-09T22:16:01Z</published>
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<id>urn:sha1:93cbfc709047a5bc3f8d86e0b55079b5077c8e00</id>
<content type='text'>
Due to clocking changes in the Skylake platform, there was i219
data corruption. To work around this, HW team reported the need
to increase the minimum gap between the PHY FIFO read and write pointers.

Signed-off-by: Yanir Lubetkin &lt;yanirx.lubetkin@intel.com&gt;
Tested-by: Aaron Brown &lt;aaron.f.brown@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>e1000e: i219 - increase IPG for speed 10/100 full duplex</title>
<updated>2015-06-26T09:43:44Z</updated>
<author>
<name>Yanir Lubetkin</name>
<email>yanirx.lubetkin@intel.com</email>
</author>
<published>2015-06-09T22:15:57Z</published>
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<id>urn:sha1:69cfbc95bdbfa2bd9a82f27dc131b08c48542f19</id>
<content type='text'>
In SPT/i219, there were CRC errors in speed 10/100 full duplex.
The solution given by the HW team is to increase the IPG from 8 to 0xC

Signed-off-by: Yanir Lubetkin &lt;yanirx.lubetkin@intel.com&gt;
Tested-by: Aaron Brown &lt;aaron.f.brown@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
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