kernel/drivers/net/ethernet/freescale/fec.h, branch linux-4.3.y

net: fec: introduce fec_ptp_stop and use in probe fail path

2015-07-27T04:51:53Z

This function frees resources and cancels delayed work item that have been initialized in fec_ptp_init(). Use this to do proper error handling if something goes wrong in probe function after fec_ptp_init has been called. Signed-off-by: Lucas Stach Acked-by: Fugang Duan Signed-off-by: David S. Miller

net: fec: don't access RACC register when not available

2015-06-29T00:02:40Z

Not all silicon implementations of the Freescale FEC hardware module have the RACC (Receive Accelerator Function) register, so we should not be trying to access it on those that don't. Currently none of the ColdFire based parts with a FEC have it. Support for RACC was introduced by commit 4c09eed9 ("net: fec: Enable imx6 enet checksum acceleration"). A fix was introduced in commit d1391930 ("net: fec: Fix build for MCF5272") that disables its use on the ColdFire M5272 part, but it doesn't fix the general case of other ColdFire parts. To fix we create a quirk flag, FEC_QUIRK_HAS_RACC, and check it before working with the RACC register. Signed-off-by: Greg Ungerer Signed-off-by: David S. Miller

Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net

2015-01-15T05:53:17Z

Conflicts: drivers/net/xen-netfront.c Minor overlapping changes in xen-netfront.c, mostly to do with some buffer management changes alongside the split of stats into TX and RX. Signed-off-by: David S. Miller

net: fec: fix MDIO bus assignement for dual fec SoC's

2015-01-14T05:27:10Z

On i.MX28, the MDIO bus is shared between the two FEC instances. The driver makes sure that the second FEC uses the MDIO bus of the first FEC. This is done conditionally if FEC_QUIRK_ENET_MAC is set. However, in newer designs, such as Vybrid or i.MX6SX, each FEC MAC has its own MDIO bus. Simply removing the quirk FEC_QUIRK_ENET_MAC is not an option since other logic, triggered by this quirk, is still needed. Furthermore, there are board designs which use the same MDIO bus for both PHY's even though the second bus would be available on the SoC side. Such layout are popular since it saves pins on SoC side. Due to the above quirk, those boards currently do work fine. The boards in the mainline tree with such a layout are: - Freescale Vybrid Tower with TWR-SER2 (vf610-twr.dts) - Freescale i.MX6 SoloX SDB Board (imx6sx-sdb.dts) This patch adds a new quirk FEC_QUIRK_SINGLE_MDIO for i.MX28, which makes sure that the MDIO bus of the first FEC is used in any case. However, the boards above do have a SoC with a MDIO bus for each FEC instance. But the PHY's are not connected in a 1:1 configuration. A proper device tree description is needed to allow the driver to figure out where to find its PHY. This patch fixes that shortcoming by adding a MDIO bus child node to the first FEC instance, along with the two PHY's on that bus, and making use of the phy-handle property to add a reference to the PHY's. Acked-by: Sascha Hauer Signed-off-by: Stefan Agner Signed-off-by: David S. Miller

net: fec: add Wake-on-LAN support

2014-12-31T18:06:50Z

Support for Wake-on-LAN using Magic Packet. ENET IP supports sleep mode in low power status, when system enter suspend status, Magic packet can wake up system even if all SOC clocks are gate. The patch doing below things: - flagging the device as a wakeup source for the system, as well as its Wake-on-LAN interrupt - prepare the hardware for entering WoL mode - add standard ethtool WOL interface - enable the ENET interrupt to wake us Tested on i.MX6q/dl sabresd, sabreauto boards, i.MX6SX arm2 boards. Signed-off-by: Fugang Duan Signed-off-by: David S. Miller

time: move the timecounter/cyclecounter code into its own file.

2014-12-30T23:29:25Z

The timecounter code has almost nothing to do with the clocksource code. Let it live in its own file. This will help isolate the timecounter users from the clocksource users in the source tree. Signed-off-by: Richard Cochran Acked-by: Jeff Kirsher Signed-off-by: David S. Miller

net: fec: init maximum receive buffer size for ring1 and ring2

2014-11-24T20:22:57Z

i.MX6SX fec support three rx ring1, the current driver lost to init ring1 and ring2 maximum receive buffer size, that cause receving frame date length error. The driver reports "rcv is not +last" error log in user case. Signed-off-by: Fugang Duan Signed-off-by: David S. Miller

net: fec: improve access to quirk flags by copying them into fec_enet_private struct

2014-11-18T20:19:31Z

Signed-off-by: Lothar Waßmann Signed-off-by: David S. Miller

net: fec: change type of 'bufdesc_ex' to bool

2014-11-18T20:19:31Z

fep->bufdesc_ex is treated as a boolean value, thus declare it as such. Signed-off-by: Lothar Waßmann Signed-off-by: David S. Miller

net: fec: properly parenthesize macro args

2014-11-18T20:19:31Z

Signed-off-by: Lothar Waßmann Signed-off-by: David S. Miller