<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/net/dsa/microchip, branch linux-6.9.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.9.y</id>
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<updated>2024-07-05T07:37:54Z</updated>
<entry>
<title>net: dsa: microchip: fix wrong register write when masking interrupt</title>
<updated>2024-07-05T07:37:54Z</updated>
<author>
<name>Tristram Ha</name>
<email>tristram.ha@microchip.com</email>
</author>
<published>2024-06-21T22:34:22Z</published>
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<id>urn:sha1:7b1efcea911356a95fa0a38dd689b48ff7be93b6</id>
<content type='text'>
[ Upstream commit b1c4b4d45263241ec6c2405a8df8265d4b58e707 ]

The switch global port interrupt mask, REG_SW_PORT_INT_MASK__4, is
defined as 0x001C in ksz9477_reg.h.  The designers used 32-bit value in
anticipation for increase of port count in future product but currently
the maximum port count is 7 and the effective value is 0x7F in register
0x001F.  Each port has its own interrupt mask and is defined as 0x#01F.
It uses only 4 bits for different interrupts.

The developer who implemented the current interrupt mechanism in the
switch driver noticed there are similarities between the mechanism to
mask port interrupts in global interrupt and individual interrupts in
each port and so used the same code to handle these interrupts.  He
updated the code to use the new macro REG_SW_PORT_INT_MASK__1 which is
defined as 0x1F in ksz_common.h but he forgot to update the 32-bit write
to 8-bit as now the mask registers are 0x1F and 0x#01F.

In addition all KSZ switches other than the KSZ9897/KSZ9893 and LAN937X
families use only 8-bit access and so this common code will eventually
be changed to accommodate them.

Fixes: e1add7dd6183 ("net: dsa: microchip: use common irq routines for girq and pirq")
Signed-off-by: Tristram Ha &lt;tristram.ha@microchip.com&gt;
Link: https://lore.kernel.org/r/1719009262-2948-1-git-send-email-Tristram.Ha@microchip.com
Signed-off-by: Paolo Abeni &lt;pabeni@redhat.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>net: dsa: microchip: use collision based back pressure mode</title>
<updated>2024-07-05T07:37:53Z</updated>
<author>
<name>Enguerrand de Ribaucourt</name>
<email>enguerrand.de-ribaucourt@savoirfairelinux.com</email>
</author>
<published>2024-06-21T14:43:21Z</published>
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<id>urn:sha1:5add2500747ce5639e019655ed656b38056f2c84</id>
<content type='text'>
[ Upstream commit d963c95bc9840d070a788c35e41b715a648717f7 ]

Errata DS80000758 states that carrier sense back pressure mode can cause
link down issues in 100BASE-TX half duplex mode. The datasheet also
recommends to always use the collision based back pressure mode.

Fixes: b987e98e50ab ("dsa: add DSA switch driver for Microchip KSZ9477")
Signed-off-by: Enguerrand de Ribaucourt &lt;enguerrand.de-ribaucourt@savoirfairelinux.com&gt;
Reviewed-by: Woojung Huh &lt;Woojung.huh@microchip.com&gt;
Acked-by: Arun Ramadoss &lt;arun.ramadoss@microchip.com&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>net: dsa: microchip: fix initial port flush problem</title>
<updated>2024-07-05T07:37:51Z</updated>
<author>
<name>Tristram Ha</name>
<email>tristram.ha@microchip.com</email>
</author>
<published>2024-06-19T00:16:42Z</published>
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<id>urn:sha1:5097b4740142a8cc54094f56e7a2c3842e867c0e</id>
<content type='text'>
[ Upstream commit ad53f5f54f351e967128edbc431f0f26427172cf ]

The very first flush in any port will flush all learned addresses in all
ports.  This can be observed by unplugging the cable from one port while
additional ports are connected and dumping the fdb entries.

This problem is caused by the initially wrong value programmed to the
REG_SW_LUE_CTRL_1 register.  Setting SW_FLUSH_STP_TABLE and
SW_FLUSH_MSTP_TABLE bits does not have an immediate effect.  It is when
ksz9477_flush_dyn_mac_table() is called then the SW_FLUSH_STP_TABLE bit
takes effect and flushes all learned entries.  After that call both bits
are reset and so the next port flush will not cause such problem again.

Fixes: b987e98e50ab ("dsa: add DSA switch driver for Microchip KSZ9477")
Signed-off-by: Tristram Ha &lt;tristram.ha@microchip.com&gt;
Link: https://patch.msgid.link/1718756202-2731-1-git-send-email-Tristram.Ha@microchip.com
Signed-off-by: Jakub Kicinski &lt;kuba@kernel.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>net: dsa: microchip: fix RGMII error in KSZ DSA driver</title>
<updated>2024-06-12T09:39:55Z</updated>
<author>
<name>Tristram Ha</name>
<email>tristram.ha@microchip.com</email>
</author>
<published>2024-05-28T21:34:26Z</published>
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<id>urn:sha1:797c6534f0160d8018462b5cd540de967032299f</id>
<content type='text'>
[ Upstream commit 278d65ccdadb5f0fa0ceaf7b9cc97b305cd72822 ]

The driver should return RMII interface when XMII is running in RMII mode.

Fixes: 0ab7f6bf1675 ("net: dsa: microchip: ksz9477: use common xmii function")
Signed-off-by: Tristram Ha &lt;tristram.ha@microchip.com&gt;
Acked-by: Arun Ramadoss &lt;arun.ramadoss@microchip.com&gt;
Acked-by: Jerry Ray &lt;jerry.ray@microchip.com&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Link: https://lore.kernel.org/r/1716932066-3342-1-git-send-email-Tristram.Ha@microchip.com
Signed-off-by: Jakub Kicinski &lt;kuba@kernel.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net</title>
<updated>2024-03-12T03:38:36Z</updated>
<author>
<name>Jakub Kicinski</name>
<email>kuba@kernel.org</email>
</author>
<published>2024-03-12T03:37:53Z</published>
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<id>urn:sha1:ed1f164038b50c5864aa85389f3ffd456f050cca</id>
<content type='text'>
Merge in late fixes to prepare for the 6.9 net-next PR.

Signed-off-by: Jakub Kicinski &lt;kuba@kernel.org&gt;
</content>
</entry>
<entry>
<title>net: dsa: microchip: make sure drive strength configuration is not lost by soft reset</title>
<updated>2024-03-08T04:23:50Z</updated>
<author>
<name>Oleksij Rempel</name>
<email>o.rempel@pengutronix.de</email>
</author>
<published>2024-03-04T13:56:12Z</published>
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<id>urn:sha1:e3fb8e8ba72b053d05ca2602acdd6b869f9f296f</id>
<content type='text'>
This driver has two separate reset sequence in different places:
- gpio/HW reset on start of ksz_switch_register()
- SW reset on start of ksz_setup()

The second one will overwrite drive strength configuration made in the
ksz_switch_register().

To fix it, move ksz_parse_drive_strength() from ksz_switch_register() to
ksz_setup().

Fixes: d67d7247f641 ("net: dsa: microchip: Add drive strength configuration")
Signed-off-by: Oleksij Rempel &lt;o.rempel@pengutronix.de&gt;
Link: https://lore.kernel.org/r/20240304135612.814404-1-o.rempel@pengutronix.de
Signed-off-by: Jakub Kicinski &lt;kuba@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net</title>
<updated>2024-03-07T18:29:36Z</updated>
<author>
<name>Jakub Kicinski</name>
<email>kuba@kernel.org</email>
</author>
<published>2024-03-07T18:19:05Z</published>
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<id>urn:sha1:e3afe5dd3abea43e056a004df02fb49f24cc5ad7</id>
<content type='text'>
Cross-merge networking fixes after downstream PR.

No conflicts.

Adjacent changes:

net/core/page_pool_user.c
  0b11b1c5c320 ("netdev: let netlink core handle -EMSGSIZE errors")
  429679dcf7d9 ("page_pool: fix netlink dump stop/resume")

Signed-off-by: Jakub Kicinski &lt;kuba@kernel.org&gt;
</content>
</entry>
<entry>
<title>net: dsa: microchip: fix register write order in ksz8_ind_write8()</title>
<updated>2024-03-06T03:10:49Z</updated>
<author>
<name>Tobias Jakobi (Compleo)</name>
<email>tobias.jakobi.compleo@gmail.com</email>
</author>
<published>2024-03-04T15:41:35Z</published>
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<id>urn:sha1:b7fb7729c94fb2d23c79ff44f7a2da089c92d81c</id>
<content type='text'>
This bug was noticed while re-implementing parts of the kernel
driver in userspace using spidev. The goal was to enable some
of the errata workarounds that Microchip describes in their
errata sheet [1].

Both the errata sheet and the regular datasheet of e.g. the KSZ8795
imply that you need to do this for indirect register accesses:
- write a 16-bit value to a control register pair (this value
  consists of the indirect register table, and the offset inside
  the table)
- either read or write an 8-bit value from the data storage
  register (indicated by REG_IND_BYTE in the kernel)

The current implementation has the order swapped. It can be
proven, by reading back some indirect register with known content
(the EEE register modified in ksz8_handle_global_errata() is one of
these), that this implementation does not work.

Private discussion with Oleksij Rempel of Pengutronix has revealed
that the workaround was apparantly never tested on actual hardware.

[1] https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ProductDocuments/Errata/KSZ87xx-Errata-DS80000687C.pdf

Signed-off-by: Tobias Jakobi (Compleo) &lt;tobias.jakobi.compleo@gmail.com&gt;
Reviewed-by: Oleksij Rempel &lt;o.rempel@pengutronix.de&gt;
Fixes: 7b6e6235b664 ("net: dsa: microchip: ksz8795: handle eee specif erratum")
Link: https://lore.kernel.org/r/20240304154135.161332-1-tobias.jakobi.compleo@gmail.com
Signed-off-by: Jakub Kicinski &lt;kuba@kernel.org&gt;
</content>
</entry>
<entry>
<title>net: dsa: microchip: Add support for bridge port isolation</title>
<updated>2024-02-26T11:35:34Z</updated>
<author>
<name>Oleksij Rempel</name>
<email>o.rempel@pengutronix.de</email>
</author>
<published>2024-02-22T07:51:13Z</published>
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<id>urn:sha1:a7f08029e2e84ecafbfff50fcff976fafee72799</id>
<content type='text'>
Implement bridge port isolation for KSZ switches. Enabling the isolation
of switch ports from each other while maintaining connectivity with the
CPU and other forwarding ports. For instance, to isolate swp1 and swp2
from each other, use the following commands:
- bridge link set dev swp1 isolated on
- bridge link set dev swp2 isolated on

Signed-off-by: Oleksij Rempel &lt;o.rempel@pengutronix.de&gt;
Acked-by: Arun Ramadoss &lt;arun.ramadoss@microchip.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: dsa: Add KSZ8567 switch support</title>
<updated>2024-02-01T10:17:24Z</updated>
<author>
<name>Philippe Schenker</name>
<email>philippe.schenker@impulsing.ch</email>
</author>
<published>2024-01-30T08:34:19Z</published>
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<id>urn:sha1:3723b56d6f73f7c8c3b521a80556f129830f6fb9</id>
<content type='text'>
This commit introduces support for the KSZ8567, a robust 7-port
Ethernet switch. The KSZ8567 features two RGMII/MII/RMII interfaces,
each capable of gigabit speeds, complemented by five 10/100 Mbps
MAC/PHYs.

Signed-off-by: Philippe Schenker &lt;philippe.schenker@impulsing.ch&gt;
Acked-by: Arun Ramadoss &lt;arun.ramadoss@microchip.com&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Reviewed-by: Florian Fainelli &lt;florian.fainelli@broadcom.com&gt;
Link: https://lore.kernel.org/r/20240130083419.135763-2-dev@pschenker.ch
Signed-off-by: Paolo Abeni &lt;pabeni@redhat.com&gt;
</content>
</entry>
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