<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/mtd/nand, branch linux-rolling-stable</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-rolling-stable</id>
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<updated>2026-03-04T12:21:34Z</updated>
<entry>
<title>mtd: rawnand: pl353: Fix software ECC support</title>
<updated>2026-03-04T12:21:34Z</updated>
<author>
<name>Andrea Scian</name>
<email>andrea.scian@dave.eu</email>
</author>
<published>2026-02-04T17:41:44Z</published>
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<id>urn:sha1:16f3e0e1473ed80157a866667cc4fb9e73ebe387</id>
<content type='text'>
[ Upstream commit 89b831ebdaca0df4ca3b226f7e7a1d1db1629060 ]

We need to set also write_page_raw in ecc structure to allow
choosing SW ECC instead of HW one, otherwise write operation fail.

Fixes: 08d8c62164a322 ("mtd: rawnand: pl353: Add support for the ARM PL353 SMC NAND controller")
Signed-off-by: Andrea Scian &lt;andrea.scian@dave.eu&gt;
Cc: stable@kernel.org
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>mtd: spinand: Disable continuous read during probe</title>
<updated>2026-03-04T12:21:29Z</updated>
<author>
<name>David LaPorte</name>
<email>dalaport@amazon.com</email>
</author>
<published>2026-01-30T01:33:22Z</published>
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<id>urn:sha1:226722b40fe0455c574519b815e653e1b069b5a6</id>
<content type='text'>
[ Upstream commit b4af7d194dc879353829f3c56988a68fbba1fbdd ]

Macronix serial NAND devices with continuous read support do not
clear the configuration register on soft reset and lack a hardware
reset pin. When continuous read is interrupted (e.g., during reboot),
the feature remains enabled at the device level.

With continuous read enabled, the OOB area becomes inaccessible and
all reads are instead directed to the main area. As a result, during
partition allocation as part of MTD device registration, the first two
bytes of the main area for the master block are read and indicate that
the block is bad. This process repeats for every subsequent block for
the partition.

All reads and writes that reference the BBT find no good blocks and
fail.

The only paths for recovery from this state are triggering the
continuous read feature by way of raw MTD reads or through a NAND
device power drain.

Disable continuous read explicitly during spinand probe to ensure
quiescent feature state.

Fixes: 631cfdd0520d ("mtd: spi-nand: Add continuous read support")
Cc: stable@vger.kernel.org
Signed-off-by: David LaPorte &lt;dalaport@amazon.com&gt;
Reviewed-by: Gunnar Kudrjavets &lt;gunnarku@amazon.com&gt;
Reviewed-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>mtd: rawnand: cadence: Fix return type of CDMA send-and-wait helper</title>
<updated>2026-02-26T23:01:16Z</updated>
<author>
<name>Alok Tiwari</name>
<email>alok.a.tiwari@oracle.com</email>
</author>
<published>2025-12-19T11:09:30Z</published>
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<id>urn:sha1:95f4d92f04a482e701c39456126769e499df8e82</id>
<content type='text'>
[ Upstream commit 6d8226cbbf124bb5613b532216b74c886a4361b7 ]

cadence_nand_cdma_send_and_wait() propagates negative errno values
from cadence_nand_cdma_send(), returns -ETIMEDOUT on failure and -EIO
when the CDMA engine reports a command failure.

However, it is declared as u32, causing error codes to wrap.
Change the return type to int to correctly propagate errors.

Fixes: ec4ba01e894d ("mtd: rawnand: Add new Cadence NAND driver to MTD subsystem")
Signed-off-by: Alok Tiwari &lt;alok.a.tiwari@oracle.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'mtd/fixes-for-6.19-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux</title>
<updated>2026-01-29T22:08:36Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-01-29T22:08:36Z</published>
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<id>urn:sha1:e9f6ac972ec0139a7988fe713740a957aea5d999</id>
<content type='text'>
Pull MTD fix from Miquel Raynal:
 "A single late MTD fix, which reverts a fix that turned out to be
  incorrect.

  The observations of the committer was that the number of IDs to be
  used to probe a chip was incorrect. It happened to be a limitation of
  his controller, not a chip issue. Restore the chip description, a
  solution must be found somewhere else"

* tag 'mtd/fixes-for-6.19-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux:
  Revert "mtd: spinand: esmt: fix id code for F50D1G41LB"
</content>
</entry>
<entry>
<title>treewide: Update email address</title>
<updated>2026-01-11T16:09:11Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@kernel.org</email>
</author>
<published>2026-01-11T15:53:48Z</published>
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<id>urn:sha1:2e4b28c48f88ce9e263957b1d944cf5349952f88</id>
<content type='text'>
In a vain attempt to consolidate the email zoo switch everything to the
kernel.org account.

Signed-off-by: Thomas Gleixner &lt;tglx@kernel.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>Revert "mtd: spinand: esmt: fix id code for F50D1G41LB"</title>
<updated>2025-12-16T08:08:28Z</updated>
<author>
<name>Ziyang Huang</name>
<email>hzyitc@outlook.com</email>
</author>
<published>2025-12-02T15:05:56Z</published>
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<id>urn:sha1:2f6d2c8d9ac05a7a1c02333f6ad30868246880d8</id>
<content type='text'>
This reverts commit dd26402642a0899fde59ea6b0852fad3d799b4cc.

The issue George met is due to the limit of QPIC, not the issue of the
flash chip.

QPIC only supports 4 bytes ID. So the fifth byte is always 0.

If we use spi-gpio, the fifth byte can be read correctly.

Signed-off-by: Ziyang Huang &lt;hzyitc@outlook.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'mtd/for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux</title>
<updated>2025-12-04T19:07:46Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-12-04T19:07:46Z</published>
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<id>urn:sha1:edd2b9832d604a234b60a4910c7496f351cd1e12</id>
<content type='text'>
Pull mtd updates from Miquel Raynal:
 "Core MTD changes:

   - We must ignore error -ENOENT from parsers on subpartitions which is
     a legitimate return value

   - PM support is added to the intel-dg driver

  Raw NAND changes:

   - The major change in this is the support for the Allwinner H616 NAND
     controller, which lead to numerous changes and cleanups in the
     driver.

   - Another notable change in this driver is the use of field_get() and
     field_prep(), but since the global support for this helpers is
     going to be merged in the same release as we start using these
     helpers, we undefine them in the first place to avoid warnings.

   - Marvell drivers layout handling changes have also landed, they fix
     previous definitions and abuses that have been made previously,
     which implied to relax the ECC parameters validation in the core a
     bit.

   - The Cadence NAND controller driver gets NV-DDR interface support.

  SPI NAND changes:

   - Support for FudanMicro FM25S01BI3 and ESMT F50L1G41LC is added.

  SPI NOR changes:

   - Fix SMPT parsing for S25FS-S flash family. They report variable
     dummy cycles for reads. This results in the default of 0 being
     used. This works for other Infineon chips, but not for the S25FS-S
     family. They need 8 dummy cycles. Add fixup hooks to specify that.
     Also add fixup hooks to fix incorrect map ID data in SFDP.

   - Add support for a bunch of Winbond flashes. Their block protection
     information is not discoverable, so they need to have an entry in
     the flash tables to describe that.

   - Some cleanups for Micron flash support.

   - Add support for Micron mt35xu01gbba.

   - Some SPI controllers like the Intel one on the PCI bus do not
     support the read CR opcode (0x35). Do not use the opcode if the
     controller does not support it.

  Aside from these main changes, there is the usual load of API updates,
  kdoc fixes, potential memory leaks fixes, etc"

* tag 'mtd/for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (51 commits)
  mtd: sm_ftl: Fix typo in comment in sm_read_lba
  mtd: sm_ftl: Replace deprecated strncpy with sysfs_emit in sm_attr_show
  mtd: lpddr_cmds: fix signed shifts in lpddr_cmds
  mtd: docg3: fix kernel-doc warnings
  mtd: spinand: add support for FudanMicro FM25S01BI3
  mtd: rawnand: renesas: Handle devm_pm_runtime_enable() errors
  mtd: nand: realtek-ecc: Fix Kconfig dependencies
  mtd: rawnand: sunxi: #undef field_{get,prep}() before local definition
  mailmap: update Pratyush Yadav's email address
  mtd: spi-nor: core: Check read CR support
  mtd: spi-nor: micron-st: add TODO for fixing mt35xu02gcba
  mtd: spi-nor: micron-st: add mt35xu01gbba support
  mtd: spi-nor: micron-st: use SFDP of mt35xu512aba
  mtd: spi-nor: micron-st: move set_octal_dtr to late_init()
  mtd: spi-nor: micron-st: rename the die_late_init functions
  mtd: spinand: esmt: add support for F50L1G41LC
  mtd: rawnand: lpc32xx_slc: Convert to use devm_gpiod_get_optional()
  mtd: mtdpart: ignore error -ENOENT from parsers on subpartitions
  mtd: maps: pcmciamtd: fix potential memory leak in pcmciamtd_detach()
  mtd: spi-nor: spansion: SMPT fixups for S25FS-S
  ...
</content>
</entry>
<entry>
<title>mtd: spinand: add support for FudanMicro FM25S01BI3</title>
<updated>2025-11-29T12:46:40Z</updated>
<author>
<name>Mikhail Zhilkin</name>
<email>csharper2005@gmail.com</email>
</author>
<published>2025-11-27T19:59:00Z</published>
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<id>urn:sha1:f6dffe2a9ed1bdcee1879e2728310fb1e08602cf</id>
<content type='text'>
Add support for FudanMicro FM25S01BI3 SPI NAND.

Link: https://www.fmsh.com/nvm/FM25S01BI3_ds_eng.pdf

Signed-off-by: Mikhail Zhilkin &lt;csharper2005@gmail.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>mtd: rawnand: renesas: Handle devm_pm_runtime_enable() errors</title>
<updated>2025-11-28T08:11:59Z</updated>
<author>
<name>Haotian Zhang</name>
<email>vulab@iscas.ac.cn</email>
</author>
<published>2025-11-23T16:35:51Z</published>
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<id>urn:sha1:a3623e1ae1ed6be4d49b2ccb9996a9d2b65c1828</id>
<content type='text'>
devm_pm_runtime_enable() can fail due to memory allocation failures.
The current code ignores its return value and proceeds with
pm_runtime_resume_and_get(), which may operate on incorrectly
initialized runtime PM state.

Check the return value of devm_pm_runtime_enable() and return the
error code if it fails.

Fixes: 6a2277a0ebe7 ("mtd: rawnand: renesas: Use runtime PM instead of the raw clock API")
Signed-off-by: Haotian Zhang &lt;vulab@iscas.ac.cn&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand: realtek-ecc: Fix Kconfig dependencies</title>
<updated>2025-11-27T17:25:05Z</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2025-11-19T19:33:57Z</published>
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<id>urn:sha1:41bdec133dc0b79e152f8dda0bf2f71a5abb5838</id>
<content type='text'>
The driver uses DMA but does not mark it as a prerequisite in
Kconfig. As it is also defined with COMPILE_TEST, autobuilders complain
about certain symbols not being available when linking on architectures
without DMA support (?) like sh.

Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Closes: https://lore.kernel.org/oe-kbuild-all/202511071114.8WeW2GZK-lkp@intel.com
Cc: Markus Stockhausen &lt;markus.stockhausen@gmx.de&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
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