kernel/drivers/mtd/devices/serial_flash_cmds.h, branch linux-rolling-stable

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 420

2019-06-05T15:37:15Z

Based on 1 normalized pattern(s): this code is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 6 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Allison Randal Reviewed-by: Armijn Hemel Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190531190113.627158185@linutronix.de Signed-off-by: Greg Kroah-Hartman

mtd: st_spi_fsm: remove SPINOR_OP_RDSR2 and use SPINOR_OP_RDCR instead

2017-06-27T19:50:17Z

The 35h instruction op code has two aliases/macro definitions: - SPINOR_OP_RDCR from include/linux/mtd/spi-nor.h - SPINOR_OP_RDSR2 from drivers/mtd/devices/serial_flash_cmds.h Actually, some manufacturers name the associated internal register Status Register 2 whereas other manufacturers name it Configuration Register hence the two different macros for the very same instruction op code. Since the spi-nor.h file is the reference file for all SPI NOR instruction op codes, this patch removes the definition of the SPINOR_OP_RDSR2 macro. Also the SPINOR_OP_RDSR2 macro will be associated to another instruction op code in a further patch so we need to avoid a conflict defining this macro twice. Indeed the JESD216 rev B specification, defining the SFDP tables, also refers to the 3Eh and 3Fh instruction op codes to write/read the Status Register 2 on some SPI NOR flash memories, the 35h op code still being used to read the Configuration Register/Status Register 2 on other memories. Signed-off-by: Cyrille Pitchen Acked-by: Marek Vasut

mtd: spi-nor: rename SPINOR_OP_* macros of the 4-byte address op codes

2017-02-10T12:55:03Z

This patch renames the SPINOR_OP_* macros of the 4-byte address instruction set so the new names all share a common pattern: the 4-byte address name is built from the 3-byte address name appending the "_4B" suffix. The patch also introduces new op codes to support other SPI protocols such as SPI 1-4-4 and SPI 1-2-2. This is a transitional patch and will help a later patch of spi-nor.c to automate the translation from the 3-byte address op codes into their 4-byte address version. Signed-off-by: Cyrille Pitchen Acked-by: Mark Brown Acked-by: Marek Vasut

mtd: st_spi_fsm: begin using spi-nor.h opcodes

2014-04-14T18:23:01Z

Many of the serial_flash_cmds.h opcodes are duplicated with spi-nor.h. Let's begin to unify them. Signed-off-by: Brian Norris Acked-by: Lee Jones Reviewed-by: Marek Vasut

mtd: st_spi_fsm: replace FLACH_CMD_* with SPINOR_OP_*

2014-04-14T18:23:01Z

Begin to unify the differences between serial_flash_cmds.h and spi-nor.h. Signed-off-by: Brian Norris Acked-by: Lee Jones Reviewed-by: Marek Vasut

mtd: devices: Provide header for shared OPCODEs and SFDP commands

2014-03-20T11:17:15Z

JEDEC have helped to standardise a great deal of the commands which can be issued to a Serial Flash devices. Many of the Serial Flash Discoverable Parameters (SFDP) commands are generic across devices. This patch provides a shared point where these commands can be defined. Suggested-by: Mark Brown Acked-by Angus Clark Signed-off-by: Lee Jones Signed-off-by: Brian Norris