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<title>kernel/drivers/mtd/chips/cfi_probe.c, branch linux-rolling-stable</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-rolling-stable</id>
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<updated>2025-09-29T16:01:32Z</updated>
<entry>
<title>mtd: cfi: use struct_size() helper for cfiq allocation</title>
<updated>2025-09-29T16:01:32Z</updated>
<author>
<name>Gopi Krishna Menon</name>
<email>krishnagopi487@gmail.com</email>
</author>
<published>2025-09-18T18:44:14Z</published>
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<id>urn:sha1:d496b6f42eb0455caf5d8cb30cf1f01b7fc2a747</id>
<content type='text'>
Documentation/process/deprecated.rst recommends against performing
dynamic size calculations in the arguments of memory allocator
function due to the risk of overflow. Such calculations can
wrap around and result in a smaller allocation than what the caller
was expecting.

Replace the size calculation in cfiq allocation with struct_size()
helper to make the code clearer and handle the overflows correctly.

Signed-off-by: Gopi Krishna Menon &lt;krishnagopi487@gmail.com&gt;
Reviewed-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
link: https://lore.kernel.org/linux-kernel-mentees/20250922071137.900508-1-rk0006818@gmail.com/T/#u
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>mtd: chips: Use SPDX license headers</title>
<updated>2023-06-09T15:27:11Z</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2023-06-03T18:52:00Z</published>
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<id>urn:sha1:87194abaa5ced8c1cee5499d9da058eadfa63f44</id>
<content type='text'>
Some of the files in mtd/chips do not have a SPDX license
header, presumably because the text string "GPL'd" didn't
parse with Thomas rulesets for magic license tagging.

Fix this, the code is initially from RedHat which clearly
targeted the Linux kernel and intended it to be GPLv2.

In any case the original author appears to be David
Woodhouse who can then confirm this.

Cc: David Woodhouse &lt;dwmw2@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20230603185200.3571174-1-linus.walleij@linaro.org
</content>
</entry>
<entry>
<title>mtd: cfi: Add early fixup for S70GL02GS</title>
<updated>2018-05-04T07:52:38Z</updated>
<author>
<name>Aaron Sierra</name>
<email>asierra@xes-inc.com</email>
</author>
<published>2018-04-30T16:35:07Z</published>
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<id>urn:sha1:0fe3ede7941dfcd6fd540fc2b086453d3ee8f236</id>
<content type='text'>
S70GL02GS flash reports a single 256 MiB chip, but is really made up
of two 128 MiB chips with 1024 sectors each.

Without early fixups (top half of device cannot be written or erased):
  ff0000000.nor-boot: Found 1 x16 devices at 0x0 in 16-bit bank. &lt;snip&gt;
  Amd/Fujitsu Extended Query Table at 0x0040
    Amd/Fujitsu Extended Query version 1.5.
  number of CFI chips: 1

With early fixups (entire device can be written and erased):
  Bad S70GL02GS CFI data; adjust to detect 2 chips
  ff0000000.nor-boot: Found 1 x16 devices at 0x0 in 16-bit bank. &lt;snip&gt;
  ff0000000.nor-boot: Found 1 x16 devices at 0x8000000 in 16-bit bank
  Amd/Fujitsu Extended Query Table at 0x0040
    Amd/Fujitsu Extended Query version 1.5.
  number of CFI chips: 2

Signed-off-by: Aaron Sierra &lt;asierra@xes-inc.com&gt;
Signed-off-by: Boris Brezillon &lt;boris.brezillon@bootlin.com&gt;
</content>
</entry>
<entry>
<title>mtd: cfi: Support early CFI fixups</title>
<updated>2018-05-04T07:50:19Z</updated>
<author>
<name>Aaron Sierra</name>
<email>asierra@xes-inc.com</email>
</author>
<published>2018-04-30T16:34:49Z</published>
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<id>urn:sha1:b1c97e2335f24dbdcc26cfdc882b8b5a0bad25c2</id>
<content type='text'>
Some CFI devices need fixups that affect the number of chips detected,
but the current fixup infrastructure (struct cfi_fixup and cfi_fixup())
does not cover this situation.

Introduce struct cfi_early_fixup and cfi_early_fixup() to fill the void.

Signed-off-by: Aaron Sierra &lt;asierra@xes-inc.com&gt;
Signed-off-by: Boris Brezillon &lt;boris.brezillon@bootlin.com&gt;
</content>
</entry>
<entry>
<title>mtd: cfi: Remove unnecessary OOM messages</title>
<updated>2014-03-11T05:42:25Z</updated>
<author>
<name>Jingoo Han</name>
<email>jg1.han@samsung.com</email>
</author>
<published>2014-02-06T06:19:35Z</published>
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<id>urn:sha1:5c8b1fbb2e1bfaffbaf9b8d8c47bb65470787de6</id>
<content type='text'>
The site-specific OOM messages are unnecessary, because they
duplicate the MM subsystem generic OOM message.

Signed-off-by: Jingoo Han &lt;jg1.han@samsung.com&gt;
Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
</content>
</entry>
<entry>
<title>mtd: cfi_cmdset_0002: make sector erase command variable</title>
<updated>2010-10-26T10:39:17Z</updated>
<author>
<name>Guillaume LECERF</name>
<email>glecerf@gmail.com</email>
</author>
<published>2010-10-26T09:45:23Z</published>
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<id>urn:sha1:08968041bef437ec363623cd3218c2b083537ada</id>
<content type='text'>
Some old SST chips use 0x50 as sector erase command, instead
of 0x30. Make this value variable to handle such chips.

Signed-off-by: Guillaume LECERF &lt;glecerf@gmail.com&gt;
Acked-by: Wolfram Sang &lt;w.sang@pengutronix.de&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
</entry>
<entry>
<title>mtd: cfi_probe: print manufacturer and id of probed chip</title>
<updated>2010-08-02T08:05:20Z</updated>
<author>
<name>Guillaume LECERF</name>
<email>glecerf@gmail.com</email>
</author>
<published>2010-06-29T08:32:37Z</published>
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<id>urn:sha1:771a115a6df06c45cf783e24c3f1f08b3e9aac4c</id>
<content type='text'>
Signed-off-by: Guillaume LECERF &lt;glecerf@gmail.com&gt;
Signed-off-by: Artem Bityutskiy &lt;Artem.Bityutskiy@nokia.com&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
</entry>
<entry>
<title>mtd: cfi_probe: add support for SST 0x0701 vendorname</title>
<updated>2010-05-14T00:08:11Z</updated>
<author>
<name>Guillaume LECERF</name>
<email>glecerf@gmail.com</email>
</author>
<published>2010-04-24T15:58:02Z</published>
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<id>urn:sha1:54b93a49d8dd90dfb658f21a3316527fe6195106</id>
<content type='text'>
SST 39VF160x and 39VF320x chips use vendorname id 0x0701 and alternative
unlock addresses. Add support for them in cfi_probe.c.

Signed-off-by: Guillaume LECERF &lt;glecerf@gmail.com&gt;
Reviewed-by: Wolfram Sang &lt;w.sang@pengutronix.de&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
</entry>
<entry>
<title>mtd: cfi_probe: make the addresses used to enter Auto Select Mode variable</title>
<updated>2010-05-14T00:07:49Z</updated>
<author>
<name>Guillaume LECERF</name>
<email>glecerf@gmail.com</email>
</author>
<published>2010-04-24T15:57:57Z</published>
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<id>urn:sha1:ad7026fef6c771fc88ecbcb111876fc050b1a4d0</id>
<content type='text'>
Make the addresses used to enter Auto Select Mode variable to leave place
for handling chips using non-standard addresses.

Signed-off-by: Guillaume LECERF &lt;glecerf@gmail.com&gt;
Reviewed-by: Wolfram Sang &lt;w.sang@pengutronix.de&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
</entry>
<entry>
<title>mtd: cfi_probe: enter Auto Select Mode after filling cfi-&gt;cfiq members</title>
<updated>2010-05-14T00:07:42Z</updated>
<author>
<name>Guillaume LECERF</name>
<email>glecerf@gmail.com</email>
</author>
<published>2010-04-24T15:57:52Z</published>
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<id>urn:sha1:8473044d644553ca3c939249490d1c5ef5f6d4e6</id>
<content type='text'>
Move the code to enter Auto Select Mode down to be able to use cfi-&gt;cfiq
members to add support for chips using alternative sequence / unlock
addresses.

Signed-off-by: Guillaume LECERF &lt;glecerf@gmail.com&gt;
Reviewed-by: Wolfram Sang &lt;w.sang@pengutronix.de&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
</content>
</entry>
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