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<title>kernel/drivers/mmc/core/sd.c, branch linux-5.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y</id>
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<updated>2019-05-31T13:43:14Z</updated>
<entry>
<title>mmc: core: Verify SD bus width</title>
<updated>2019-05-31T13:43:14Z</updated>
<author>
<name>Raul E Rangel</name>
<email>rrangel@chromium.org</email>
</author>
<published>2019-04-29T17:32:39Z</published>
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<id>urn:sha1:aeae78ba0a0e6138b86589da6cf32a355c662a63</id>
<content type='text'>
[ Upstream commit 9e4be8d03f50d1b25c38e2b59e73b194c130df7d ]

The SD Physical Layer Spec says the following: Since the SD Memory Card
shall support at least the two bus modes 1-bit or 4-bit width, then any SD
Card shall set at least bits 0 and 2 (SD_BUS_WIDTH="0101").

This change verifies the card has specified a bus width.

AMD SDHC Device 7806 can get into a bad state after a card disconnect
where anything transferred via the DATA lines will always result in a
zero filled buffer. Currently the driver will continue without error if
the HC is in this condition. A block device will be created, but reading
from it will result in a zero buffer. This makes it seem like the SD
device has been erased, when in actuality the data is never getting
copied from the DATA lines to the data buffer.

SCR is the first command in the SD initialization sequence that uses the
DATA lines. By checking that the response was invalid, we can abort
mounting the card.

Reviewed-by: Avri Altman &lt;avri.altman@wdc.com&gt;
Signed-off-by: Raul E Rangel &lt;rrangel@chromium.org&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>mmc: core: Add a debug print when the card may have been replaced</title>
<updated>2019-02-28T08:28:27Z</updated>
<author>
<name>hongjiefang</name>
<email>hongjiefang@asrmicro.com</email>
</author>
<published>2019-02-28T06:08:28Z</published>
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<id>urn:sha1:099b648116090acf0c65c8df867aa1cb42476f3b</id>
<content type='text'>
If the card was removed in suspended state and a new one was inserted,
print a debug log when the check detects that it's not the old card.

Signed-off-by: hongjiefang &lt;hongjiefang@asrmicro.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>mmc: core: Add discard support to sd</title>
<updated>2019-02-28T08:16:12Z</updated>
<author>
<name>Avri Altman</name>
<email>avri.altman@wdc.com</email>
</author>
<published>2019-02-26T15:10:24Z</published>
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<id>urn:sha1:bc47e2f6f9e261ea07c678c3cad76eb5590c0fea</id>
<content type='text'>
SD spec v5.1 adds discard support. The flows and commands are similar to
mmc, so just set the discard arg in CMD38.

A host which supports DISCARD shall check if the DISCARD_SUPPORT (b313)
is set in the SD_STATUS register.  If the card does not support discard,
the host shall not issue DISCARD command, but ERASE command instead.

Post the DISCARD operation, the card may de-allocate the discarded
blocks partially or completely. So the host mustn't make any assumptions
concerning the content of the discarded region. This is unlike ERASE
command, in which the region is guaranteed to contain either '0's or
'1's, depends on the content of DATA_STAT_AFTER_ERASE (b55) in the scr
register.

One more important difference compared to ERASE is the busy timeout
which we will address on the next patch.

Signed-off-by: Avri Altman &lt;avri.altman@wdc.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>mmc: core: Indicate SD specs higher than 4.0</title>
<updated>2019-02-25T07:40:58Z</updated>
<author>
<name>Avri Altman</name>
<email>avri.altman@wdc.com</email>
</author>
<published>2019-02-06T11:28:06Z</published>
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<id>urn:sha1:68539e2bc34437d8c5fbcc234dddcc40bd6bb1cb</id>
<content type='text'>
SD specs version 4.x and 5.x have a dedicated slices in the SCR register.
Higher versions will rely on a combination of the existing fields.

Signed-off-by: Avri Altman &lt;avri.altman@wdc.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>mmc: core: Calculate the discard arg only once</title>
<updated>2019-02-25T07:40:58Z</updated>
<author>
<name>Avri Altman</name>
<email>avri.altman@wdc.com</email>
</author>
<published>2019-02-06T11:28:05Z</published>
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<id>urn:sha1:01904ff77676ca6c88e972906ed204a2dfbabab6</id>
<content type='text'>
In MMC, the discard arg is a read-only ext_csd parameter - set it once
on card init. To be consistent, do that for SD as well even though its
discard arg is always 0x0.

Signed-off-by: Avri Altman &lt;avri.altman@wdc.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>mmc: core: Rename -&gt;reset() bus ops to -&gt;hw_reset()</title>
<updated>2018-05-08T07:33:29Z</updated>
<author>
<name>Ulf Hansson</name>
<email>ulf.hansson@linaro.org</email>
</author>
<published>2018-04-05T11:24:43Z</published>
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<id>urn:sha1:3a3db6030b64ceb4b4e41a6811168c5d90a9f7f8</id>
<content type='text'>
The bus ops -&gt;reset() executes a full HW reset of the card, as the calling
function mmc_hw_reset() also indicates by its name. Let's convert to follow
the similar names, for both the bus ops callback and for the corresponding
bus ops functions, as to clarify the purpose of code.

Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Tested-by: Quentin Schulz &lt;quentin.schulz@bootlin.com&gt;
Reviewed-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>mmc: core: Add capability to avoid 3.3V signaling</title>
<updated>2018-05-02T13:08:44Z</updated>
<author>
<name>Kyle Roeschley</name>
<email>kyle.roeschley@ni.com</email>
</author>
<published>2018-04-13T21:54:57Z</published>
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<id>urn:sha1:247cfe53557524a94dd1001d19e5aa50bd5aca81</id>
<content type='text'>
Some SD host controllers cannot handle extended use of 3.3V signaling.
To accommodate these controllers, add a capability that requires us to
negotiate the voltage down from 3.3V during card initialization.

Signed-off-by: Kyle Roeschley &lt;kyle.roeschley@ni.com&gt;
Signed-off-by: Jennifer Dahm &lt;jennifer.dahm@ni.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>mmc: core: Export card RCA register via sysfs</title>
<updated>2018-03-15T13:43:05Z</updated>
<author>
<name>Harish Jenny K N</name>
<email>harish_kandiga@mentor.com</email>
</author>
<published>2018-03-07T05:01:42Z</published>
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<id>urn:sha1:974e85e90c84a32f49b70c6615f1e8f156f38a3c</id>
<content type='text'>
This patch exports RCA register to sysfs which will help in reading the
disk identification information.

Reviewed-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
Signed-off-by: Harish Jenny K N &lt;harish_kandiga@mentor.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>mmc: sd: Remove redundant err assignment from mmc_read_switch</title>
<updated>2018-03-15T08:32:30Z</updated>
<author>
<name>Shawn Lin</name>
<email>shawn.lin@rock-chips.com</email>
</author>
<published>2018-02-27T01:26:35Z</published>
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<id>urn:sha1:3715ce57f4d26d09fc1813d157286abc5aa319a5</id>
<content type='text'>
Variable err would be firstly initialized by the return value of
mmc_sd_switch().

Signed-off-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>mmc: core: Don't try UHS-I mode if 4-bit mode isn't supported</title>
<updated>2018-03-15T08:30:39Z</updated>
<author>
<name>Shawn Lin</name>
<email>shawn.lin@rock-chips.com</email>
</author>
<published>2018-02-27T00:49:25Z</published>
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<id>urn:sha1:d6743a8a1ae38269a41094ad14d7ef86199f661d</id>
<content type='text'>
Per SD specification physical layer v4.0, section 3.9.4, it
says "UHS-I supports only 4-bit mode. Host shall select 4-bit
mode by ACMD6. However mmc_sd_init_uhs_card() still go ahead
to initialize the cards anyway, whether card or host won't
support 4-bit mode.

  This breaks the platforms which could support UHS-I mode but on
some certain boards only support 1-bit mode with a UHS-I card inserted,
as all the tuning process is broken due to this. Alternatively, we
should check the return value from mmc_set_bus_width() to see if host
could finish the request to switch the bus width on its side. But that
needs more thing to do than this patch that just bails out early to try
high speed mode if 4-bit mode isn't available for whatever reason. And
this patch could also fix the same problem for sdio since R4_18V_PRESENT
won't be set for ocr when mmc_sdio_init_card() finds mmc_host_uhs()
is false.

  Note that this patch doesn't keep the checking of card-&gt;scr.sda_spec3
and comparing card-&gt;scr.bus_widths with SD_SCR_BUS_WIDTH_4 within
mmc_sd_init_uhs_card() since if the sd cards response with SD_ROCR_S18A,
it definitely supports UHS-I mode, which implicitly means these checkings
are always true.

Signed-off-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
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