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<title>kernel/drivers/misc/eeprom/at24.c, branch linux-rolling-stable</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
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<updated>2025-03-03T11:08:24Z</updated>
<entry>
<title>eeprom: at24: Drop of_match_ptr() and ACPI_PTR() protections</title>
<updated>2025-03-03T11:08:24Z</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2025-02-25T10:08:38Z</published>
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<id>urn:sha1:f25f405d250fdc7e2e67be8d1732cbbc7cd782d0</id>
<content type='text'>
These result in a very small reduction in driver size, but at the cost
of more complex build and slightly harder to read code. In the case of
of_match_ptr() it also prevents use of PRP0001 ACPI based identification.
In this particular case we have a valid ACPI/PNP ID that should be used
in preference to PRP0001 but doesn't mean we should prevent that route.

With this done, drop unneeded of*.h inclusions and __maybe_unused markers.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Link: https://lore.kernel.org/r/20250225100838.362125-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
</content>
</entry>
<entry>
<title>eeprom: at24: add ST M24256E Additional Write lockable page support</title>
<updated>2024-10-22T07:11:30Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2024-10-17T18:41:26Z</published>
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<id>urn:sha1:339cb28b9ee6679aea359620b0508170d815a1b1</id>
<content type='text'>
The ST M24256E behaves as a regular M24C256, except for the E variant
which uses up another I2C address for Additional Write lockable page.
This page is 64 Bytes long and can contain additional data. Add entry
for it, so users can describe that page in DT. Note that users still
have to describe the main M24C256 area separately as that is on separate
I2C address from this page.

Unlike M24C32-D and M24C64-D, this part is specifically ST and does not
have any comparable M24* counterparts from other vendors, hence the st,
vendor prefix. Furthermore, the part name is M24256E without C between
the 24 and 256, this is not a typo. Finally, there is M24C256-D part,
which does contain 32 Bytes long Additional Write lockable page, which
is a different part and not supported by this patch.

Datasheet: https://www.st.com/resource/en/datasheet/m24256e-f.pdf

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Link: https://lore.kernel.org/r/20241017184152.128395-2-marex@denx.de
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
</content>
</entry>
<entry>
<title>eeprom: at24: Add support for Microchip 24AA025E48/24AA025E64 EEPROMs</title>
<updated>2024-07-03T09:55:59Z</updated>
<author>
<name>Claudiu Beznea</name>
<email>claudiu.beznea@microchip.com</email>
</author>
<published>2024-07-03T08:47:02Z</published>
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<id>urn:sha1:b61ea8705095e5d242762268cfebf48c848315f6</id>
<content type='text'>
Add "microchip,24aa025e48", "microchip,24aa025e64" compatible for the
usage w/ 24AA025E{48, 64} type of EEPROMs where "24aa025e48" stands
for EUI-48 address and "24aa025e64" stands for EUI-64 address.

[andrei.simion@microchip.com: Use AT24_DATA_CHIP with AT24_FLAG_READONLY for
24AA025E{48, 64} type of EEPROMs. Reword commit message.]

Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;
Signed-off-by: Andrei Simion &lt;andrei.simion@microchip.com&gt;
Link: https://lore.kernel.org/r/20240703084704.197697-2-andrei.simion@microchip.com
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
</content>
</entry>
<entry>
<title>eeprom: at24: fix memory corruption race condition</title>
<updated>2024-04-23T08:07:48Z</updated>
<author>
<name>Daniel Okazaki</name>
<email>dtokazaki@google.com</email>
</author>
<published>2024-04-22T17:43:36Z</published>
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<id>urn:sha1:f42c97027fb75776e2e9358d16bf4a99aeb04cf2</id>
<content type='text'>
If the eeprom is not accessible, an nvmem device will be registered, the
read will fail, and the device will be torn down. If another driver
accesses the nvmem device after the teardown, it will reference
invalid memory.

Move the failure point before registering the nvmem device.

Signed-off-by: Daniel Okazaki &lt;dtokazaki@google.com&gt;
Fixes: b20eb4c1f026 ("eeprom: at24: drop unnecessary label")
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20240422174337.2487142-1-dtokazaki@google.com
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'i2c-for-6.8-rc1-rebased' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux</title>
<updated>2024-01-19T01:29:01Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2024-01-19T01:29:01Z</published>
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<id>urn:sha1:ed8d84530ab0a3b7b370e8b28f12179314dcfcc3</id>
<content type='text'>
Pull i2c updates from Wolfram Sang:
 "This removes the currently unused CLASS_DDC support (controllers set
  the flag, but there is no client to use it).

  Also, CLASS_SPD support gets simplified to prepare removal in the
  future. Class based instantiation is not recommended these days
  anyhow.

  Furthermore, I2C core now creates a debugfs directory per I2C adapter.
  Current bus driver users were converted to use it.

  Finally, quite some driver updates. Standing out are patches for the
  wmt-driver which is refactored to support more variants.

  This is the rebased pull request where a large series for the
  designware driver was dropped"

* tag 'i2c-for-6.8-rc1-rebased' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (38 commits)
  MAINTAINERS: use proper email for my I2C work
  i2c: stm32f7: add support for stm32mp25 soc
  i2c: stm32f7: perform I2C_ISR read once at beginning of event isr
  dt-bindings: i2c: document st,stm32mp25-i2c compatible
  i2c: stm32f7: simplify status messages in case of errors
  i2c: stm32f7: perform most of irq job in threaded handler
  i2c: stm32f7: use dev_err_probe upon calls of devm_request_irq
  i2c: i801: Add lis3lv02d for Dell XPS 15 7590
  i2c: i801: Add lis3lv02d for Dell Precision 3540
  i2c: wmt: Reduce redundant: REG_CR setting
  i2c: wmt: Reduce redundant: function parameter
  i2c: wmt: Reduce redundant: clock mode setting
  i2c: wmt: Reduce redundant: wait event complete
  i2c: wmt: Reduce redundant: bus busy check
  i2c: mux: reg: Remove class-based device auto-detection support
  i2c: make i2c_bus_type const
  dt-bindings: at24: add ROHM BR24G04
  eeprom: at24: use of_match_ptr()
  i2c: cpm: Remove linux,i2c-index conversion from be32
  i2c: imx: Make SDA actually optional for bus recovering
  ...
</content>
</entry>
<entry>
<title>eeprom: at24: use of_match_ptr()</title>
<updated>2024-01-18T20:10:43Z</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>bartosz.golaszewski@linaro.org</email>
</author>
<published>2023-11-23T10:30:32Z</published>
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<id>urn:sha1:2b0eee4f6add17a74f696a6f40ad2a4fa173613e</id>
<content type='text'>
This driver does not depend on CONFIG_OF so using of_match_ptr() makes
sense to reduce the size a bit.

Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
</content>
</entry>
<entry>
<title>eeprom: at24: Use pm_runtime_resume_and_get to simplify the code</title>
<updated>2024-01-04T16:01:14Z</updated>
<author>
<name>Heiner Kallweit</name>
<email>hkallweit1@gmail.com</email>
</author>
<published>2023-12-20T15:11:14Z</published>
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<id>urn:sha1:e68f487133d515234bdf00b85fedd0fe6216349e</id>
<content type='text'>
Use helper pm_runtime_resume_and_get() to simplify the code.

Signed-off-by: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Link: https://lore.kernel.org/r/c3045427-da42-4f7c-8a96-3c4756646cd0@gmail.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>eeprom: at24: Probe for DDR3 thermal sensor in the SPD case</title>
<updated>2024-01-04T16:01:14Z</updated>
<author>
<name>Heiner Kallweit</name>
<email>hkallweit1@gmail.com</email>
</author>
<published>2023-12-20T12:55:58Z</published>
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<id>urn:sha1:caba40ec3531b0849f44502a03117796e8c9f4a1</id>
<content type='text'>
The DDR3 SPD data structure advertises the presence of a thermal
sensor on a DDR3 module in byte 32, bit 7. Let's use this information
to explicitly instantiate the thermal sensor I2C client instead of
having to rely on class-based I2C probing.

The temp sensor i2c address can be derived from the SPD i2c address,
so we can directly instantiate the device and don't have to probe
for it. If the temp sensor has been instantiated already by other
means (e.g. class-based auto-detection), then the busy-check in
i2c_new_client_device will detect this.

Note: Thermal sensors on DDR4 DIMM's are instantiated from the
      ee1004 driver.

Signed-off-by: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Link: https://lore.kernel.org/r/68113672-3724-44d5-9ff8-313dd6628f8c@gmail.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>eeprom: at24: add ST M24C64-D Additional Write lockable page support</title>
<updated>2023-10-16T06:49:15Z</updated>
<author>
<name>Alexander Stein</name>
<email>alexander.stein@ew.tq-group.com</email>
</author>
<published>2023-10-13T06:30:08Z</published>
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<id>urn:sha1:3774740fb22162d2c50e79629c4b3e11022ed7d9</id>
<content type='text'>
The ST M24C64-D behaves as a regular M24C64, except for the -D variant
which uses up another I2C address for Additional Write lockable page.
This page is 32 Bytes long and can contain additional data. Add entry
for it, so users can describe that page in DT. Note that users still
have to describe the main M24C64 area separately as that is on separate
I2C address from this page.

Signed-off-by: Alexander Stein &lt;alexander.stein@ew.tq-group.com&gt;
Reviewed-by: Marek Vasut &lt;marex@denx.de&gt;
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
</content>
</entry>
<entry>
<title>eeprom: at24: add ST M24C32-D Additional Write lockable page support</title>
<updated>2023-10-12T09:04:34Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2023-10-10T19:09:26Z</published>
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<id>urn:sha1:4791146e9055dd4c21a1a725514512167b8ee75b</id>
<content type='text'>
The ST M24C32-D behaves as a regular M24C32, except for the -D variant
which uses up another I2C address for Additional Write lockable page.
This page is 32 Bytes long and can contain additional data. Add entry
for it, so users can describe that page in DT. Note that users still
have to describe the main M24C32 area separately as that is on separate
I2C address from this page.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
</content>
</entry>
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