kernel/drivers/mfd/lpc_ich.c, branch linux-5.1.y

mfd: lpc_ich: Do not touch SPI-NOR write protection bit on Apollo Lake

2018-01-08T11:03:35Z

Just to be on the safe side, don't touch the bit. If write access to the flash chip is needed, the BIOS needs to enable it explicitly. Signed-off-by: Mika Westerberg Signed-off-by: Lee Jones

mfd: lpc_ich: Avoton/Rangeley uses SPI_BYT method

2017-10-24T08:12:03Z

Avoton/Rangeley are based on Silvermount micro-architecture, like Bay Trail, and uses the INTEL_SPI_BYT method to drive SPI. Cc: stable@vger.kernel.org Signed-off-by: Joakim Tjernlund Acked-by: Mika Westerberg Signed-off-by: Lee Jones

mfd: lpc_ich: Do not touch SPI-NOR write protection bit on Haswell/Broadwell

2017-09-05T07:46:01Z

At least on Lenovo Thinkpad Yoga, the BIOS seems to monitor the SPI-NOR write protection bit and if it is flipped to read/write it assumes the BIOS configuration was changed on next reboot. It then, for unknown reasons, resets the BIOS settings back to default. We can prevent this by just leaving the write protection bit intact and let the SPI-NOR driver know whether the device is writable or not. In case of this particular Lenovo the SPI-NOR flash will be exposed as read-only. Fixes: ff00d7a32a1b ("mfd: lpc_ich: Add support for SPI serial flash host controller") Link: https://bugzilla.kernel.org/show_bug.cgi?id=195951 Reported-by: Abdó Roig-Marange Signed-off-by: Mika Westerberg Signed-off-by: Lee Jones

mfd: lpc_ich: Add support for Intel Gemini Lake SoC

2017-04-27T10:54:43Z

Like Intel Apollo Lake, Gemini Lake exposes the serial SPI flash device BAR through hidden P2SB PCI device. We use the same mechanism than Apollo Lake to read the BAR and pass it to the driver. Signed-off-by: Mika Westerberg Signed-off-by: Lee Jones

mfd: lpc_ich: Add PCI ID for Intel Cougar Mountain SoC

2017-04-27T08:25:03Z

This patches adds the first minimal support to the upstream Linux tree. Signed-off-by: Priyalee Kushwaha Signed-off-by: Alan Cox Signed-off-by: Lee Jones

mfd: lpc_ich: Enable watchdog on Intel Apollo Lake PCH

2017-02-13T09:29:44Z

Assign iTCO_version which effectively enables watchdog device on Intel Apollo Lake PCH. Signed-off-by: Tan Jui Nee Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg Signed-off-by: Lee Jones

mfd: lpc_ich: Remove useless comments in core part

2017-02-13T09:29:44Z

First of all, remove stalled references to datasheets. If someone knows the document numbers, it would be added later. Second, remove FSF snail address since it's subject to change. Actual information can be found on FSF site on the internet. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg Signed-off-by: Lee Jones

mfd: lpc_ich: Add support for Intel Apollo Lake SoC

2017-01-03T17:34:16Z

Intel Apollo Lake SoC exposes serial SPI flash through the LPC device. The SPI flash host controller is not discoverable through PCI config cycles because P2SB (function 0 of the device 13) is hidden by the BIOS. We unhide the device briefly in order to read BAR 0 of the SPI host controller. Signed-off-by: Mika Westerberg Acked-by: Lee Jones Acked-by: Marek Vasut Signed-off-by: Lee Jones

mfd: lpc_ich: Add support for SPI serial flash host controller

2017-01-03T17:34:15Z

Many Intel CPUs including Haswell, Broadwell and Baytrail have SPI serial flash host controller as part of the LPC device. This will populate an MFD cell suitable for the SPI host controller driver if we know that the LPC device has one. Signed-off-by: Mika Westerberg Acked-by: Lee Jones Signed-off-by: Lee Jones

mfd: lpc_ich: Use gpio-ich driver for 8-series and 9-series Intel PCH devices

2016-11-21T13:00:17Z

The Intel 8-series and 9-series PCH devices, described by the descriptors LPC_LPT and LPC_9S although codenamed 'lynxpoint' do not use the same GPIO register layout which is used by the gpio-lynxpoint driver. They use the same ICH_V5_GPIO layout as the gpio-ich driver. See: http://www.intel.com/content/www/us/en/chipsets/8-series-chipset-pch-datasheet.html http://www.intel.com/content/www/us/en/chipsets/9-series-chipset-pch-datasheet.html The devices described by "Mobile 4th Generation Intel Core Processor Family I/O" manual use the gpio-lynxpoint driver and are described by the LPC_LPT_LP descriptor. See: http://www.intel.com/content/www/us/en/processors/core/4th-gen-core-family-mobile-i-o-datasheet.html Signed-off-by: Dan Gora Signed-off-by: Lee Jones