<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/memory, branch linux-6.5.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-6.5.y</id>
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<updated>2023-11-20T10:57:06Z</updated>
<entry>
<title>memory: tegra: Set BPMP msg flags to reset IPC channels</title>
<updated>2023-11-20T10:57:06Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2023-10-09T10:05:57Z</published>
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<id>urn:sha1:8e3f93cd849fafba15ab526a377231cd42e433d3</id>
<content type='text'>
[ Upstream commit f344675a34383ae26a8230f4b1cd99cbd0defebd ]

Set the 'TEGRA_BPMP_MESSAGE_RESET' bit in newly added 'flags' field
of 'struct tegra_bpmp_message' to request for the reset of BPMP IPC
channels. This is used along with the 'suspended' check in BPMP driver
for handling early bandwidth requests due to the hotplug of CPU's
during system resume before the driver gets resumed.

Fixes: f41e1442ac5b ("cpufreq: tegra194: add OPP support and set bandwidth")
Co-developed-by: Sumit Gupta &lt;sumitg@nvidia.com&gt;
Signed-off-by: Sumit Gupta &lt;sumitg@nvidia.com&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>memory: tegra: make icc_set_bw return zero if BWMGR not supported</title>
<updated>2023-07-25T20:09:20Z</updated>
<author>
<name>Sumit Gupta</name>
<email>sumitg@nvidia.com</email>
</author>
<published>2023-06-21T13:44:00Z</published>
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<id>urn:sha1:faafd6ca7e6e7100d21d3f43ec17674f36c9f843</id>
<content type='text'>
Return zero from icc_set_bw() to MC client driver if MRQ_BWMGR_INT
is not supported by the BPMP-FW. Currently, 'EINVAL' is returned
which causes error message in client drivers even when the platform
doesn't support scaling.

Fixes: 9365bf006f53 ("PCI: tegra194: Add interconnect support in Tegra234")
Signed-off-by: Sumit Gupta &lt;sumitg@nvidia.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Link: https://lore.kernel.org/r/20230621134400.23070-5-sumitg@nvidia.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Add dummy implementation on Tegra194</title>
<updated>2023-07-10T10:04:56Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2023-06-29T16:01:32Z</published>
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<id>urn:sha1:d1478aea649e739a0a0e4890cd8b049ae5d08c13</id>
<content type='text'>
With the introduction of commit 9365bf006f53 ("PCI: tegra194: Add
interconnect support in Tegra234"), the PCI driver on Tegra194 and later
requires an interconnect provider. However, a provider is currently only
exposed on Tegra234 and this causes PCI on Tegra194 to defer probe
indefinitely.

Fix this by adding a dummy implementation on Tegra194. This allows nodes
to be provided to interconnect consumers, but doesn't do any bandwidth
accounting or frequency scaling.

Fixes: 9365bf006f53 ("PCI: tegra194: Add interconnect support in Tegra234")
Reported-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Reviewed-by: Sumit Gupta &lt;sumitg@nvidia.com&gt;
Tested-by: Sumit Gupta &lt;sumitg@nvidia.com&gt;
Link: https://lore.kernel.org/r/20230629160132.768940-1-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'asm-generic-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic</title>
<updated>2023-07-06T17:06:04Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2023-07-06T17:06:04Z</published>
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<id>urn:sha1:7b82e90411826deee07c180ec35f64d31051d154</id>
<content type='text'>
Pull asm-generic updates from Arnd Bergmann:
 "These are cleanups for architecture specific header files:

   - the comments in include/linux/syscalls.h have gone out of sync and
     are really pointless, so these get removed

   - The asm/bitsperlong.h header no longer needs to be architecture
     specific on modern compilers, so use a generic version for newer
     architectures that use new enough userspace compilers

   - A cleanup for virt_to_pfn/virt_to_bus to have proper type checking,
     forcing the use of pointers"

* tag 'asm-generic-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic:
  syscalls: Remove file path comments from headers
  tools arch: Remove uapi bitsperlong.h of hexagon and microblaze
  asm-generic: Unify uapi bitsperlong.h for arm64, riscv and loongarch
  m68k/mm: Make pfn accessors static inlines
  arm64: memory: Make virt_to_pfn() a static inline
  ARM: mm: Make virt_to_pfn() a static inline
  asm-generic/page.h: Make pfn accessors static inlines
  xen/netback: Pass (void *) to virt_to_page()
  netfs: Pass a pointer to virt_to_page()
  cifs: Pass a pointer to virt_to_page() in cifsglob
  cifs: Pass a pointer to virt_to_page()
  riscv: mm: init: Pass a pointer to virt_to_page()
  ARC: init: Pass a pointer to virt_to_pfn() in init
  m68k: Pass a pointer to virt_to_pfn() virt_to_page()
  fs/proc/kcore.c: Pass a pointer to virt_addr_valid()
</content>
</entry>
<entry>
<title>Merge tag 'memory-controller-drv-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers</title>
<updated>2023-06-22T15:34:02Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2023-06-22T15:34:02Z</published>
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<id>urn:sha1:57cf6633f3853591b92019533e19bca543ec619f</id>
<content type='text'>
Memory controller drivers for v6.5

1. Renesas RPC IF: correct the Strobe Timing Adjustment.
2. Broadcom DPFE: fix smatch warning for testing array offset after use.
3. Atmel SDRAMC: drop driver because it was just a wrapper over enabling
   clock which is not handled by its clock controller.
4. Minor bindings cleanup.

* tag 'memory-controller-drv-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  dt-bindings: memory-controllers: drop unneeded quotes
  memory: atmel-sdramc: remove the driver
  memory: brcmstb_dpfe: fix testing array offset after use
  memory: renesas-rpc-if: Fix PHYCNT.STRTIM setting

Link: https://lore.kernel.org/r/20230612175508.288775-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>memory: atmel-sdramc: remove the driver</title>
<updated>2023-06-02T08:39:24Z</updated>
<author>
<name>Claudiu Beznea</name>
<email>claudiu.beznea@microchip.com</email>
</author>
<published>2023-05-16T07:24:05Z</published>
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<id>urn:sha1:d3369a4b6f0164b8869a097547846ed4e5c9c47f</id>
<content type='text'>
Driver does only clock request + enable for DDR clocks. DDR clocks are
enabled by bootloader and need to stay that way in Linux. To avoid having
these clocks disabled by clock subsystem in case there are no Linux
consumers for them the clocks were marked as critical in clock drivers
(in commit 68b3b6f1773d ("clk: at91: mark ddr clocks as critical")).
With this, there is no need to have a separate driver that only does
clock request + enable.

Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;
Link: https://lore.kernel.org/r/20230516072405.2696225-1-claudiu.beznea@microchip.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
</content>
</entry>
<entry>
<title>memory: brcmstb_dpfe: fix testing array offset after use</title>
<updated>2023-05-30T08:25:24Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2023-05-13T11:29:31Z</published>
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<id>urn:sha1:1d9e93fad549bc38f593147479ee063f2872c170</id>
<content type='text'>
Code should first check for valid value of array offset, then use it as
the index.  Fixes smatch warning:

  drivers/memory/brcmstb_dpfe.c:443 __send_command() error: testing array offset 'cmd' after use.

Fixes: 2f330caff577 ("memory: brcmstb: Add driver for DPFE")
Acked-by: Markus Mayer &lt;mmayer@broadcom.com&gt;
Reviewed-by: Florian Fainelli &lt;florian.fainelli@broadcom.com&gt;
Link: https://lore.kernel.org/r/20230513112931.176066-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
</content>
</entry>
<entry>
<title>ARM: mm: Make virt_to_pfn() a static inline</title>
<updated>2023-05-29T09:27:08Z</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2022-06-02T08:18:32Z</published>
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<id>urn:sha1:a9ff6961601d9aa0c42b6eb7d850371f31b1f5e6</id>
<content type='text'>
Making virt_to_pfn() a static inline taking a strongly typed
(const void *) makes the contract of a passing a pointer of that
type to the function explicit and exposes any misuse of the
macro virt_to_pfn() acting polymorphic and accepting many types
such as (void *), (unitptr_t) or (unsigned long) as arguments
without warnings.

Doing this is a bit intrusive: virt_to_pfn() requires
PHYS_PFN_OFFSET and PAGE_SHIFT to be defined, and this is defined in
&lt;asm/page.h&gt;, so this must be included *before* &lt;asm/memory.h&gt;.

The use of macros were obscuring the unclear inclusion order here,
as the macros would eventually be resolved, but a static inline
like this cannot be compiled with unresolved macros.

The naive solution to include &lt;asm/page.h&gt; at the top of
&lt;asm/memory.h&gt; does not work, because &lt;asm/memory.h&gt; sometimes
includes &lt;asm/page.h&gt; at the end of itself, which would create a
confusing inclusion loop. So instead, take the approach to always
unconditionally include &lt;asm/page.h&gt; at the end of &lt;asm/memory.h&gt;

arch/arm uses &lt;asm/memory.h&gt; explicitly in a lot of places,
however it turns out that if we just unconditionally include
&lt;asm/memory.h&gt; into &lt;asm/page.h&gt; and switch all inclusions of
&lt;asm/memory.h&gt; to &lt;asm/page.h&gt; instead, we enforce the right
order and &lt;asm/memory.h&gt; will always have access to the
definitions.

Put an inclusion guard in place making it impossible to include
&lt;asm/memory.h&gt; explicitly.

Link: https://lore.kernel.org/linux-mm/20220701160004.2ffff4e5ab59a55499f4c736@linux-foundation.org/
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Make CPU cluster BW request a multiple of MC channels</title>
<updated>2023-05-16T10:11:01Z</updated>
<author>
<name>Sumit Gupta</name>
<email>sumitg@nvidia.com</email>
</author>
<published>2023-05-11T17:32:08Z</published>
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<id>urn:sha1:e852af72a7f21f4d25994365af86a92438d68014</id>
<content type='text'>
Make CPU cluster's bandwidth (BW) request a multiple of MC channels.
CPU OPP tables have BW info per MC channel. But, the actual BW depends
on the number of MC channels which can change as per the boot config.
Get the number of MC channels which are actually enabled in current
boot configuration and multiply the BW request from a CPU cluster with
the number of enabled MC channels. This is not required to be done for
other MC clients.

Signed-off-by: Sumit Gupta &lt;sumitg@nvidia.com&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Add software memory clients in Tegra234</title>
<updated>2023-05-16T10:11:00Z</updated>
<author>
<name>Sumit Gupta</name>
<email>sumitg@nvidia.com</email>
</author>
<published>2023-05-11T17:32:06Z</published>
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<id>urn:sha1:80b19e09c8fb04a6397278b1c16403042629614f</id>
<content type='text'>
Add dummy memory controller clients to represent CPU clusters. They will
be used by the CPUFREQ driver to scale DRAM FREQ with the CPU FREQ.

Signed-off-by: Sumit Gupta &lt;sumitg@nvidia.com&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
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