kernel/drivers/memory/tegra/tegra210.c, branch linux-5.1.yHosts the 0x221E linux distro kernel.https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y2018-04-30T08:12:21Zmemory: tegra: Add Tegra210 memory controller hot resets2018-04-30T08:12:21ZThierry Redingtreding@nvidia.com2018-04-13T11:33:50Zurn:sha1:273d760060e365c37e6e5bb3c0810a5b93fa569d
Define the table of memory controller hot resets for Tegra210.
Signed-off-by: Thierry Reding <treding@nvidia.com>
memory: tegra: Remove unused headers inclusions2018-04-27T09:23:52ZDmitry Osipenkodigetx@gmail.com2018-04-09T19:28:30Zurn:sha1:85dce8918f90f71fc86ae822dd8cf4b738274f7e
Tegra210 contains some unused leftover headers, remove them for
consistency.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
memory: tegra: Apply interrupts mask per SoC2018-04-27T09:23:04ZDmitry Osipenkodigetx@gmail.com2018-04-09T19:28:29Zurn:sha1:1c74d5c0de0c2cc29fef97a19251da2ad6f579bd
Currently we are enabling handling of interrupts specific to Tegra124+
which happen to overlap with previous generations. Let's specify
interrupts mask per SoC generation for consistency and in a preparation
of squashing of Tegra20 driver into the common one that will enable
handling of GART faults which may be undesirable by newer generations.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
memory: tegra: Create SMMU display groups2017-12-15T09:12:32ZThierry Redingtreding@nvidia.com2017-10-12T14:29:19Zurn:sha1:2a8102dfe0da7dbb61794e6b85dc7ac9271e5fc8
Create SMMU display groups for Tegra30, Tegra114, Tegra124 and Tegra210.
This allows the display controllers on these devices to share the same
IOMMU domain using the standard IOMMU group mechanism.
Signed-off-by: Thierry Reding <treding@nvidia.com>
memory: tegra: Add Tegra210 support2015-08-13T14:07:52ZThierry Redingtreding@nvidia.com2015-03-23T09:45:12Zurn:sha1:588c43a7bd5a53ae523b318e1db16bdd59963a3c
Add the table of memory clients and SWGROUPs for Tegra210 to enable SMMU
support for this new SoC.
Signed-off-by: Thierry Reding <treding@nvidia.com>