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<title>kernel/drivers/memory/mtk-smi.c, branch linux-5.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y</id>
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<updated>2017-08-22T14:38:00Z</updated>
<entry>
<title>memory: mtk-smi: Degrade SMI init to module_init</title>
<updated>2017-08-22T14:38:00Z</updated>
<author>
<name>Yong Wu</name>
<email>yong.wu@mediatek.com</email>
</author>
<published>2017-08-21T11:00:21Z</published>
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<id>urn:sha1:4f608d382e6fa982655e37d0e1b6c134fdc0e4c3</id>
<content type='text'>
The initialization of MediaTek power manager(SCPSYS) is
builtin_platform_driver, and SMI must depend on power-domain.
Thus, currently subsys_initcall for SMI is unnecessary, SMI will be
always probe defered by power-domain. Degrade it to module_init.

In addition, there are two small changes about the probe sequence:
1) Delete this two lines.
    	if (!dev-&gt;pm_domain)
		return -EPROBE_DEFER;
   This is not helpful. the platform driver framework guarantee this.
   The "dev_pm_domain_attach" in the "platform_drv_probe" will return
   EPROBE_DEFER if its powerdomain is not ready.

2) Add the probe-defer for the smi-larb device should waiting for
   smi-common.
   In mt2712, there are 2 smi-commons, 10 smi-larbs. All will be
   probe-defered by the power-domain, there is seldom case that
   smi-larb probe done before smi-common. then it will hang like
   this:

   Unable to handle kernel NULL pointer dereference at virtual address
00000000 pgd = ffffff800a4e0000
[00000000] *pgd=00000000beffe003[   17.610026] , *pud=00000000beffe003
...
[&lt;ffffff800897fe04&gt;] mtk_smi_enable+0x1c/0xd0
[&lt;ffffff800897fee8&gt;] mtk_smi_larb_get+0x30/0x98
[&lt;ffffff80088edfa8&gt;] mtk_mipicsi0_resume+0x38/0x1b8
[&lt;ffffff8008634f44&gt;] pm_generic_runtime_resume+0x3c/0x58
[&lt;ffffff8008644ff8&gt;] __genpd_runtime_resume+0x38/0x98
[&lt;ffffff8008647434&gt;] genpd_runtime_resume+0x164/0x220
[&lt;ffffff80086372f8&gt;] __rpm_callback+0x78/0xa0
[&lt;ffffff8008637358&gt;] rpm_callback+0x38/0xa0
[&lt;ffffff8008638a4c&gt;] rpm_resume+0x4a4/0x6f8
[&lt;ffffff8008638d04&gt;] __pm_runtime_resume+0x64/0xa0
[&lt;ffffff80088ed05c&gt;] mtk_mipicsi0_probe+0x40c/0xb70
[&lt;ffffff800862cdc0&gt;] platform_drv_probe+0x58/0xc0
[&lt;ffffff800862a514&gt;] driver_probe_device+0x284/0x438
[&lt;ffffff800862a8ac&gt;] __device_attach_driver+0xb4/0x160
[&lt;ffffff8008627d58&gt;] bus_for_each_drv+0x68/0xa8
[&lt;ffffff800862a0a4&gt;] __device_attach+0xd4/0x168
[&lt;ffffff800862a9d4&gt;] device_initial_probe+0x24/0x30
[&lt;ffffff80086291d8&gt;] bus_probe_device+0xa0/0xa8
[&lt;ffffff8008629784&gt;] deferred_probe_work_func+0x94/0xf0
[&lt;ffffff80080f03a8&gt;] process_one_work+0x1d8/0x6e0

Signed-off-by: Yong Wu &lt;yong.wu@mediatek.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>iommu/mediatek: Add mt2712 IOMMU support</title>
<updated>2017-08-22T14:37:58Z</updated>
<author>
<name>Yong Wu</name>
<email>yong.wu@mediatek.com</email>
</author>
<published>2017-08-21T11:00:16Z</published>
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<id>urn:sha1:e6dec92308628cff5f1f8bd1bcdf87581c9dc676</id>
<content type='text'>
The M4U IP blocks in mt2712 is MTK's generation2 M4U which use the
ARM Short-descriptor like mt8173, and most of the HW registers are
the same.

The difference is that there are 2 M4U HWs in mt2712 while there's
only one in mt8173. The purpose of 2 M4U HWs is for balance the
bandwidth.

Normally if there are 2 M4U HWs, there should be 2 iommu domains,
each M4U has a iommu domain.

Signed-off-by: Yong Wu &lt;yong.wu@mediatek.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>memory: mtk-smi: Handle return value of clk_prepare_enable</title>
<updated>2017-08-15T15:46:23Z</updated>
<author>
<name>Arvind Yadav</name>
<email>arvind.yadav.cs@gmail.com</email>
</author>
<published>2017-08-10T05:17:32Z</published>
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<id>urn:sha1:46cc815d6d8c3c9dd18ffae1e3e818eb3ce2c788</id>
<content type='text'>
clk_prepare_enable() can fail here and we must check its return value.

Signed-off-by: Arvind Yadav &lt;arvind.yadav.cs@gmail.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>memory: mtk-smi: add larbid handle routine</title>
<updated>2017-08-04T10:04:58Z</updated>
<author>
<name>Honghui Zhang</name>
<email>honghui.zhang@mediatek.com</email>
</author>
<published>2017-08-04T01:32:26Z</published>
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<id>urn:sha1:363932cdef4ba4e359ffd544d5b31d3eb31b358a</id>
<content type='text'>
In the commit 3c8f4ad85c4b ("memory/mediatek: add support for mt2701"),
the larb-&gt;larbid was added but not initialized.
Mediatek's gen1 smi need this hardware larbid information to get the
register offset which controls whether enable iommu for this larb.
This patch add the initialize routine for larbid.

Reviewed-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Honghui Zhang &lt;honghui.zhang@mediatek.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>memory: mtk-smi: Use of_device_get_match_data helper</title>
<updated>2017-08-04T10:04:57Z</updated>
<author>
<name>Honghui Zhang</name>
<email>honghui.zhang@mediatek.com</email>
</author>
<published>2017-08-04T01:32:25Z</published>
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<id>urn:sha1:75487860a874a79aaa286c600989249aa9fe8fdc</id>
<content type='text'>
Replace custom code with generic helper to retrieve driver data.

Signed-off-by: Honghui Zhang &lt;honghui.zhang@mediatek.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>memory/mediatek: add support for mt2701</title>
<updated>2016-06-21T09:36:19Z</updated>
<author>
<name>Honghui Zhang</name>
<email>honghui.zhang@mediatek.com</email>
</author>
<published>2016-06-08T09:50:59Z</published>
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<id>urn:sha1:3c8f4ad85c4b61fcf2c56e1d281d691ac595243a</id>
<content type='text'>
Mediatek SMI has two generations of HW architecture, mt8173 uses the
second generation of SMI HW while mt2701 uses the first generation
HW of SMI.

There's slight differences between the two generations, for generation 2,
the register which control the iommu port access PA or IOVA is at each
larb's register base. But for generation 1, the register is at smi ao
base(smi always on register base).
Besides that, the smi async clock should be prepared and enabled for SMI
generation 1 HW to transform the smi clock into emi clock domain, but is
not needed for SMI generation 2.

This patch add SMI driver for mt2701 which use generation 1 SMI HW.

Signed-off-by: Honghui Zhang &lt;honghui.zhang@mediatek.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>memory: mtk-smi: export mtk_smi_larb_get/put</title>
<updated>2016-05-06T12:20:56Z</updated>
<author>
<name>Philipp Zabel</name>
<email>p.zabel@pengutronix.de</email>
</author>
<published>2016-04-27T08:48:00Z</published>
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<id>urn:sha1:cb1b5dff49a16433063eb94022b4182af56aedd9</id>
<content type='text'>
To allow building mediatek-drm.ko as a module, the
mtk_smi_larb_get and mtk_smi_larb_put symbols have
to be exported.

Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>memory: mediatek: Add SMI driver</title>
<updated>2016-02-25T15:49:08Z</updated>
<author>
<name>Yong Wu</name>
<email>yong.wu@mediatek.com</email>
</author>
<published>2016-02-22T17:20:49Z</published>
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<id>urn:sha1:cc8bbe1a83128ad06457e4dc69907c4f9a6fc1a7</id>
<content type='text'>
This patch add SMI(Smart Multimedia Interface) driver. This driver
is responsible to enable/disable iommu and control the power domain
and clocks of each local arbiter.

Signed-off-by: Yong Wu &lt;yong.wu@mediatek.com&gt;
Tested-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Reviewed-by: Daniel Kurtz &lt;djkurtz@chromium.org&gt;
Tested-by: Daniel Kurtz &lt;djkurtz@chromium.org&gt;
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
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