<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/mailbox/mailbox-mpfs.c, branch 0x221E-v0.0.1-v6.19</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=0x221E-v0.0.1-v6.19</id>
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<updated>2025-01-18T22:04:51Z</updated>
<entry>
<title>mailbox: mpfs: fix copy and paste bug in probe</title>
<updated>2025-01-18T22:04:51Z</updated>
<author>
<name>Dan Carpenter</name>
<email>dan.carpenter@linaro.org</email>
</author>
<published>2024-11-30T10:07:23Z</published>
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<id>urn:sha1:f055feb49c1c4333abb80ce1e9d93841cf74ea84</id>
<content type='text'>
This code accidentally checks -&gt;ctrl_base instead of -&gt;mbox_base so the
error handling can never be triggered.

Fixes: a4123ffab9ec ("mailbox: mpfs: support new, syscon based, devicetree configuration")
Signed-off-by: Dan Carpenter &lt;dan.carpenter@linaro.org&gt;
Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Signed-off-by: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;
</content>
</entry>
<entry>
<title>mailbox: mpfs: support new, syscon based, devicetree configuration</title>
<updated>2024-11-24T18:54:16Z</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2024-10-02T10:48:00Z</published>
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<id>urn:sha1:a4123ffab9ece0c2d3d5c460724d49c4051fd279</id>
<content type='text'>
The two previous bindings for this hardware were incorrect, as the
control/status and interrupt register regions should have been described
as syscons and dealt with via regmap in the driver. Add support for
accessing these registers using that method now, so that the hwmon
driver can be supported without using auxdev or hacks with io_remap().

Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Signed-off-by: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;
</content>
</entry>
<entry>
<title>mailbox: Explicitly include correct DT includes</title>
<updated>2023-09-05T15:10:58Z</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2023-07-14T17:47:01Z</published>
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<id>urn:sha1:e9803aac5097ac74186b074d3176318fd10ec98c</id>
<content type='text'>
The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it as merged into the regular platform bus.
As part of that merge prepping Arm DT support 13 years ago, they
"temporarily" include each other. They also include platform_device.h
and of.h. As a result, there's a pretty much random mix of those include
files used throughout the tree. In order to detangle these headers and
replace the implicit includes with struct declarations, users need to
explicitly include the correct includes.

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>mailbox: mpfs: check the service status in .tx_done()</title>
<updated>2023-04-03T18:26:04Z</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2023-03-07T20:22:54Z</published>
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<id>urn:sha1:37e3430176ff333afb013314a6c949660d75cc92</id>
<content type='text'>
Services are supposed to generate an interrupt once completed, whether
or not they have do so successfully. What appears to be a bug in the
system controller means that interrupts are only generated for
*successful* services.

Currently, the status of a service is only checked in the
mpfs_mbox_rx_data() once an interrupt is received. As it turns out, this
is not really helpful where the potentially buggy behaviour is present,
as we'll only see the status for successes where it is moot anyway.

Jassi suggested moving the check to the .tx_done() callback instead.
This makes sense, as the busy bit that tx_done() is polling will be
lowered on completion, regardless of whether the service passed or
failed.
That allows us to check the status bits for all services, whether they
generate an interrupt or not &amp; pass something more informative than
-EBADMSG back to the drivers implementing individual services.

Suggested-by: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;
Acked-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
Tested-by: Valentina Fernandez &lt;valentina.fernandezalanis@microchip.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>mailbox: mpfs: ditch a useless busy check</title>
<updated>2023-04-03T18:25:52Z</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2023-03-07T20:22:53Z</published>
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<id>urn:sha1:da82f95f7c0752f36cdb8ff99d543004e4e3acdf</id>
<content type='text'>
mpfs_mbox_rx_data() already checks if the system controller is busy
before attempting to do anything, so drop the second check before
reading any data.

No functional change intended.

Acked-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
Tested-by: Valentina Fernandez &lt;valentina.fernandezalanis@microchip.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>mailbox: mpfs: switch to txdone_poll</title>
<updated>2023-04-03T18:25:46Z</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2023-03-07T20:22:52Z</published>
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<id>urn:sha1:b5984a9844fc45cd301a28fb56f3de95f7e20f3c</id>
<content type='text'>
The system controller on PolarFire SoC has no interrupt to signify that
the TX has been completed. The interrupt instead signals that a service
requested by the mailbox client has succeeded. If a service fails, there
will be no interrupt delivered.

Switch to polling the busy register to determine whether transmission
has completed.

Fixes: 83d7b1560810 ("mbox: add polarfire soc system controller mailbox")
Acked-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
Tested-by: Valentina Fernandez &lt;valentina.fernandezalanis@microchip.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>mailbox: mpfs: fix an incorrect mask width</title>
<updated>2023-04-03T18:25:31Z</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2023-03-07T20:22:51Z</published>
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<id>urn:sha1:75dfbcbfd781f826c73ebe42b78d49c23179d082</id>
<content type='text'>
The system controller registers on PolarFire SoC are 32 bits wide, so
16 + 16 as the first input to GENMASK_ULL() gives a 33 bit wide mask.
It probably should have been immediately obvious when it was pointed
out during review that the width required using GENMASK_ULL() - but I
scarcely knew what I was doing at the time and missed it.
The mistake ends up being moot as it is a mask after all, but it is
incorrect and should be fixed.

No functional change intended.

Acked-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
Tested-by: Valentina Fernandez &lt;valentina.fernandezalanis@microchip.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>mailbox: mpfs: read the system controller's status</title>
<updated>2022-12-19T02:40:30Z</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2022-11-23T17:56:52Z</published>
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<id>urn:sha1:ab47d0bfdf88faac0eb02749e5bfaa306e004300</id>
<content type='text'>
Some services explicitly return an error code in their response, but
others rely on the system controller to set a status in its status
register. The meaning of the bits varies based on what service is
requested, so pass it back up to the driver that requested the service
in the first place. The field in the message struct already existed, but
was unused until now.

If the system controller is busy, in which case we should never actually
be in the interrupt handler, or if the service fails the mailbox itself
should not be read. Callers should check the status before operating on
the response.

There's an existing, but unused, #define for the mailbox mask - but it
was incorrect. It was doing a GENMASK_ULL(32, 16) which should've just
been a GENMASK(31, 16), so fix that up and start using it.

Fixes: 83d7b1560810 ("mbox: add polarfire soc system controller mailbox")
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Reviewed-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>mailbox: mpfs: account for mbox offsets while sending</title>
<updated>2022-10-06T02:48:38Z</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2022-08-24T07:08:12Z</published>
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<id>urn:sha1:0d1aadfe10ba17ebdeb96abb9638eb0f623f9b55</id>
<content type='text'>
The mailbox offset is not only used for receiving messages, but it is
also used by messages sent to the system controller by Linux that have a
payload, such as the "digital signature service". It is also overloaded
by certain other services (reprogramming of the FPGA fabric, see Link:)
to have a meaning other than the offset the system controller should
read from.
When the driver was written, no such services of the latter type were
in use &amp; those of the former used an offset of zero so this has gone
un-noticed.

Link: https://www.microsemi.com/document-portal/doc_download/1245815-polarfire-fpga-and-polarfire-soc-fpga-system-services-user-guide # Section 5.2
Fixes: 83d7b1560810 ("mbox: add polarfire soc system controller mailbox")
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>mailbox: mpfs: fix handling of the reg property</title>
<updated>2022-10-06T02:48:31Z</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2022-08-24T07:08:11Z</published>
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<id>urn:sha1:2e10289d1f304f5082a4dda55a677b72b3bdb581</id>
<content type='text'>
The "data" region of the PolarFire SoC's system controller mailbox is
not one continuous register space - the system controller's QSPI sits
between the control and data registers. Split the "data" reg into two
parts: "data" &amp; "control". Optionally get the "data" register address
from the 3rd reg property in the devicetree &amp; fall back to using the
old base + MAILBOX_REG_OFFSET that the current code uses.

Fixes: 83d7b1560810 ("mbox: add polarfire soc system controller mailbox")
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
</feed>
