<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/irqchip/Makefile, branch linux-5.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y'/>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/'/>
<updated>2019-03-06T18:22:26Z</updated>
<entry>
<title>Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2019-03-06T18:22:26Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2019-03-06T18:22:26Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=afe6fe7036c6efdcb46cabc64bec9b6e4a005210'/>
<id>urn:sha1:afe6fe7036c6efdcb46cabc64bec9b6e4a005210</id>
<content type='text'>
Pull ARM SoC late updates from Arnd Bergmann:
 "Here are two branches that came relatively late during the linux-5.0
  development cycle and have dependencies on the other branches:

   - On the TI OMAP platform, the CPSW Ethernet PHY mode selection
     driver is being replaced, this puts the final pieces in place

   - On the DaVinci platform, the interrupt handling code in arch/arm
     gets moved into a regular device driver in drivers/irqchip.

  Since they both had some time in linux-next after the 5.0-rc8 release,
  I'm sending them along with the other updates"

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (38 commits)
  net: ethernet: ti: cpsw: deprecate cpsw-phy-sel driver
  ARM: davinci: remove intc related fields from davinci_soc_info
  irqchip: davinci-cp-intc: move the driver to drivers/irqchip
  ARM: davinci: cp-intc: remove redundant comments
  ARM: davinci: cp-intc: drop GPL license boilerplate
  ARM: davinci: cp-intc: use readl/writel_relaxed()
  ARM: davinci: cp-intc: unify error handling
  ARM: davinci: cp-intc: improve coding style
  ARM: davinci: cp-intc: request the memory region before remapping it
  ARM: davinci: cp-intc: use the new-style config structure
  ARM: davinci: cp-intc: convert all hex numbers to lowercase
  ARM: davinci: cp-intc: use a common prefix for all symbols
  ARM: davinci: cp-intc: add the new config structures for da8xx SoCs
  irqchip: davinci-cp-intc: add a new config structure
  ARM: davinci: cp-intc: add a wrapper around cp_intc_init()
  ARM: davinci: cp-intc: remove cp_intc.h
  irqchip: davinci-aintc: move the driver to drivers/irqchip
  ARM: davinci: aintc: remove unnecessary includes
  ARM: davinci: aintc: remove the timer-specific irq_set_handler()
  ARM: davinci: aintc: request memory region before remapping it
  ...
</content>
</entry>
<entry>
<title>irqchip: davinci-cp-intc: move the driver to drivers/irqchip</title>
<updated>2019-02-19T14:33:42Z</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>bgolaszewski@baylibre.com</email>
</author>
<published>2019-02-14T14:52:30Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=0fc3d74cf946b52dfea3be978ec07bf86990a46c'/>
<id>urn:sha1:0fc3d74cf946b52dfea3be978ec07bf86990a46c</id>
<content type='text'>
The cp-intc driver has now been cleaned up. Move it to drivers/irqchip
where it belongs.

Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Bartosz Golaszewski &lt;bgolaszewski@baylibre.com&gt;
Reviewed-by: David Lechner &lt;david@lechnology.com&gt;
Signed-off-by: Sekhar Nori &lt;nsekhar@ti.com&gt;
</content>
</entry>
<entry>
<title>irqchip: davinci-aintc: move the driver to drivers/irqchip</title>
<updated>2019-02-19T14:32:17Z</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>bgolaszewski@baylibre.com</email>
</author>
<published>2019-02-14T14:52:16Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=0145beed9d2603870509e0701bc77c86c386fc02'/>
<id>urn:sha1:0145beed9d2603870509e0701bc77c86c386fc02</id>
<content type='text'>
The aintc driver has now been cleaned up. Move it to drivers/irqchip
where it belongs. There's no device-tree support for any dm* board so
there's no IRQCHIP_OF_DECLARE() - there's only the exported init
function called from machine code.

Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Reviewed-by: David Lechner &lt;david@lechnology.com&gt;
Signed-off-by: Bartosz Golaszewski &lt;bgolaszewski@baylibre.com&gt;
Signed-off-by: Sekhar Nori &lt;nsekhar@ti.com&gt;
</content>
</entry>
<entry>
<title>irqchip: Add driver for Loongson-1 interrupt controller</title>
<updated>2019-02-14T10:34:18Z</updated>
<author>
<name>Jiaxun Yang</name>
<email>jiaxun.yang@flygoat.com</email>
</author>
<published>2019-02-01T06:22:35Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=9e543e22e204722357fe43c4769bb22329e65381'/>
<id>urn:sha1:9e543e22e204722357fe43c4769bb22329e65381</id>
<content type='text'>
This controller appeared on Loongson-1 family MCUs
including Loongson-1B and Loongson-1C.

Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>irqchip: Add driver for imx-irqsteer controller</title>
<updated>2018-12-18T15:37:22Z</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2018-12-17T14:01:20Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=0136afa08967f6e160b9b4e85a7a70e4180a8333'/>
<id>urn:sha1:0136afa08967f6e160b9b4e85a7a70e4180a8333</id>
<content type='text'>
The irqsteer block is a interrupt multiplexer/remapper found on the
i.MX8 line of SoCs.

Signed-off-by: Fugang Duan &lt;fugang.duan@nxp.com&gt;
Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>irqchip: Add driver for Cirrus Logic Madera codecs</title>
<updated>2018-12-18T14:06:56Z</updated>
<author>
<name>Richard Fitzgerald</name>
<email>rf@opensource.cirrus.com</email>
</author>
<published>2018-12-14T14:44:16Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=da0abe1a04110491697ca9ff146e1107f40b4808'/>
<id>urn:sha1:da0abe1a04110491697ca9ff146e1107f40b4808</id>
<content type='text'>
The Cirrus Logic Madera codecs (Cirrus Logic CS47L35/85/90/91 and WM1840)
are highly complex devices containing up to 7 programmable DSPs and many
other internal sources of interrupts plus a number of GPIOs that can be
used as interrupt inputs. The large number (&gt;150) of internal interrupt
sources are managed by an on-board interrupt controller.

This driver provides the handling for the interrupt controller. As the
codec is accessed via regmap, we can make use of the generic IRQ
functionality from regmap to do most of the work. Only around half of
the possible interrupt source are currently of interest from the driver
so only this subset is defined. Others can be added in future if needed.

The KConfig options are not user-configurable because this driver is
mandatory so is automatically included when the parent MFD driver is
selected.

Signed-off-by: Richard Fitzgerald &lt;rf@opensource.cirrus.com&gt;
Signed-off-by: Charles Keepax &lt;ckeepax@opensource.cirrus.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>irqchip: Add RDA8810PL interrupt driver</title>
<updated>2018-12-13T09:35:57Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2018-12-10T17:35:43Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=d852e62ad689a4be2e48c4a9c8926f53a7894942'/>
<id>urn:sha1:d852e62ad689a4be2e48c4a9c8926f53a7894942</id>
<content type='text'>
Add interrupt driver for RDA Micro RDA8810PL SoC.

Signed-off-by: Andreas Färber &lt;afaerber@suse.de&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Reviewed-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'csky-for-linus-4.20' of https://github.com/c-sky/csky-linux</title>
<updated>2018-10-29T15:25:00Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2018-10-29T15:25:00Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=ac435075892e3e651c667b4a9f2267cf3ef1d5a2'/>
<id>urn:sha1:ac435075892e3e651c667b4a9f2267cf3ef1d5a2</id>
<content type='text'>
Pull C-SKY architecture port from Guo Ren:
 "This contains the Linux port for C-SKY(csky) based on linux-4.19
  Release, which has been through 10 rounds of review on mailing list.

  More information:

    http://en.c-sky.com

  The development repo:

    https://github.com/c-sky/csky-linux

  ABI Documentation:

    https://github.com/c-sky/csky-doc

  Here is the pre-built cross compiler for fast test from our CI:

    https://gitlab.com/c-sky/buildroot/-/jobs/101608095/artifacts/file/output/images/csky_toolchain_qemu_csky_ck807f_4.18_glibc_defconfig_482b221e52908be1c9b2ccb444255e1562bb7025.tar.xz

  We use buildroot as our CI-test enviornment. "LTP, Lmbench ..." will
  be tested for every commit. See here for more details:

    https://gitlab.com/c-sky/buildroot/pipelines

  We'll continouslly improve csky subsystem in future"

Arnd acks, and adds the following notes:
 "I did a thorough review of the ABI, which as usual mainly consists of
  spotting any files that don't use the asm-generic ABI itself, and
  having it changed to it matches exactly what we do on other new
  architectures.

  I also looked at every other patch and commented on maybe half of them
  where I saw something that did not quite seem right. Others have
  reviewed specific patches in greater depth. I'm sure that one could
  fine more of the minor details, but as long as they are not ABI
  relevant, they can be fixed later.

  The only patch that is part of the ABI and that nobody reviewed is the
  signal handling. This is one of the areas I never worked on in much
  detail. I did not see anything wrong with it, but I also don't know
  what the problems with the other architectures are here, and we seem
  to be hitting issues occasionally, and we never managed to generalize
  this enough for new architectures to have a trivial implementation.

  I was originally hoping that we could have the 64-bit time_t
  interfaces ready in time to completely drop the 32-bit ones, but that
  did not happen. We might still remove them in the next merge window
  depending on whether the libc upstream people prefer to keep them or
  not.

  One more general comment: I think this may well be the last new CPU
  architecture we ever add to the kernel. Both nds32 and c-sky are made
  by companies that also work on risc-v, and generally speaking risc-v
  seems to be killing off any of the minor licensable instruction set
  projects, just like ARM has mostly killed off the custom
  vendor-specific instruction sets already.

  If we add another architecture in the future, it may instead be
  something like the LLVM bitcode or WebAssembly, who knows?"

To which Geert Uytterhoeven pipes in about another architecture still in
the pipeline: Kalray MPPA.

* tag 'csky-for-linus-4.20' of https://github.com/c-sky/csky-linux: (24 commits)
  dt-bindings: interrupt-controller: C-SKY APB intc
  irqchip: add C-SKY APB bus interrupt controller
  dt-bindings: interrupt-controller: C-SKY SMP intc
  irqchip: add C-SKY SMP interrupt controller
  MAINTAINERS: Add csky
  dt-bindings: Add vendor prefix for csky
  dt-bindings: csky CPU Bindings
  csky: Misc headers
  csky: SMP support
  csky: Debug and Ptrace GDB
  csky: User access
  csky: Library functions
  csky: ELF and module probe
  csky: Atomic operations
  csky: IRQ handling
  csky: VDSO and rt_sigreturn
  csky: Process management and Signal
  csky: MMU and page table management
  csky: Cache and TLB routines
  csky: System Call
  ...
</content>
</entry>
<entry>
<title>irqchip: add C-SKY APB bus interrupt controller</title>
<updated>2018-10-25T16:54:30Z</updated>
<author>
<name>Guo Ren</name>
<email>ren_guo@c-sky.com</email>
</author>
<published>2018-09-16T07:57:14Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=edff1b4835b71e14538d3a48568fa513ee9f7931'/>
<id>urn:sha1:edff1b4835b71e14538d3a48568fa513ee9f7931</id>
<content type='text'>
The driver is for C-SKY APB bus interrupt controller. It's a simple
interrupt controller which use pending reg to detect the irq and use
enable/disable reg to mask/unmask interrupt sources.

A lot of SOCs based on C-SKY CPU use the interrupt controller as root
controller.

Signed-off-by: Guo Ren &lt;ren_guo@c-sky.com&gt;
Reviewed-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
</content>
</entry>
<entry>
<title>irqchip: add C-SKY SMP interrupt controller</title>
<updated>2018-10-25T16:54:29Z</updated>
<author>
<name>Guo Ren</name>
<email>ren_guo@c-sky.com</email>
</author>
<published>2018-09-16T07:57:14Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=d8a5f5f79122b42b8afdce29f03683c1b8cdb60e'/>
<id>urn:sha1:d8a5f5f79122b42b8afdce29f03683c1b8cdb60e</id>
<content type='text'>
The driver is for C-SKY SMP interrupt controller. It support 16
soft-irqs, 16 private-irqs, and 992 max external-irqs, a total of
1024 interrupts.

C-SKY CPU 807/810/860 SMP/non-SMP could use it.

Signed-off-by: Guo Ren &lt;ren_guo@c-sky.com&gt;
Reviewed-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
</feed>
