kernel/drivers/gpu/ipu-v3/ipu-prv.h, branch linux-4.3.y

gpu: ipu-v3: Add ipu_idmac_buffer_is_ready()

2014-09-02T12:55:48Z

Add ipu_idmac_buffer_is_ready(), returns true if the given buffer in the given channel is set ready (owned by IPU), or false if not ready (owned by CPU core). Support has been added for third buffer, there is no support yet for triple-buffering in idmac channels, but this function checks buffer-ready for third buffer in case this support is added later. Signed-off-by: Steve Longerbeam Signed-off-by: Philipp Zabel

gpu: ipu-v3: Move IDMAC channel names to imx-ipu-v3.h

2014-09-02T12:55:47Z

Move the IDMAC channel names to imx-ipu-v3.h, to make the names available outside IPU. Add a couple new channels in the process (async display BG/FG, channels 24 and 29). Signed-off-by: Steve Longerbeam Signed-off-by: Philipp Zabel

gpu: ipu-v3: Add Image Converter unit

2014-09-02T12:55:43Z

Adds the Image Converter (IC) unit. Signed-off-by: Steve Longerbeam Condensed the three CSC setup functions into a single one that uses static tables to set up the CSC task parameters. Signed-off-by: Philipp Zabel

gpu: ipu-v3: Add Camera Sensor Interface unit

2014-09-02T12:55:42Z

Adds the Camera Sensor Interface (CSI) unit required for video capture. Signed-off-by: Steve Longerbeam Removed the unused clk_get_rate in ipu_csi_init_interface and the ipu_csi_ccir_err_detection_enable/disable functions. Checkpatch cleanup. Signed-off-by: Philipp Zabel

gpu: ipu-v3: Rename and add IDMAC channels

2014-08-18T12:17:48Z

Rename the ENC/VF/PP rotation channel names, to be more consistent with the convention that *_MEM is write-to-memory channels and MEM_* is read-from-memory channels. Also add the channels who's source and destination is the IC. Signed-off-by: Steve Longerbeam Signed-off-by: Philipp Zabel

gpu: ipu-v3: Add ipu-cpmem unit

2014-08-18T12:17:41Z

Move channel parameter memory setup functions and macros into a new submodule ipu-cpmem. In the process, cleanup arguments to the functions to take a channel pointer instead of a pointer into cpmem for that channel. That allows the structure of the parameter memory to be private to ipu-cpmem.c. Signed-off-by: Steve Longerbeam Signed-off-by: Philipp Zabel

Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux

2014-06-12T18:32:30Z

Pull drm updates from Dave Airlie: "This is the main drm merge window pull request, changes all over the place, mostly normal levels of churn. Highlights: Core drm: More cleanups, fix race on connector/encoder naming, docs updates, object locking rework in prep for atomic modeset i915: mipi DSI support, valleyview power fixes, cursor size fixes, execlist refactoring, vblank improvements, userptr support, OOM handling improvements radeon: GPUVM tuning and large page size support, gart fixes, deep color HDMI support, HDMI audio cleanups nouveau: - displayport rework should fix lots of issues - initial gk20a support - gk110b support - gk208 fixes exynos: probe order fixes, HDMI changes, IPP consolidation msm: debugfs updates, misc fixes ast: ast2400 support, sync with UMS driver tegra: cleanups, hdmi + hw cursor for Tegra 124. panel: fixes existing panels add some new ones. ipuv3: moved from staging to drivers/gpu" * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (761 commits) drm/nouveau/disp/dp: fix tmds passthrough on dp connector drm/nouveau/dp: probe dpcd to determine connectedness drm/nv50-: trigger update after all connectors disabled drm/nv50-: prepare for attaching a SOR to multiple heads drm/gf119-/disp: fix debug output on update failure drm/nouveau/disp/dp: make use of postcursor when its available drm/g94-/disp/dp: take max pullup value across all lanes drm/nouveau/bios/dp: parse lane postcursor data drm/nouveau/dp: fix support for dpms drm/nouveau: register a drm_dp_aux channel for each dp connector drm/g94-/disp: add method to power-off dp lanes drm/nouveau/disp/dp: maintain link in response to hpd signal drm/g94-/disp: bash and wait for something after changing lane power regs drm/nouveau/disp/dp: split link config/power into two steps drm/nv50/disp: train PIOR-attached DP from second supervisor drm/nouveau/disp/dp: make use of existing output data for link training drm/gf119/disp: start removing direct vbios parsing from supervisor drm/nv50/disp: start removing direct vbios parsing from supervisor drm/nouveau/disp/dp: maintain receiver caps in response to hpd signal drm/nouveau/disp/dp: create subclass for dp outputs ...

gpu: ipu-v3: Add SMFC code

2014-06-04T09:07:10Z

The Sensor Multi Fifo Controller (SMFC) is used as a buffer between the two CSIs (writing simultaneously) and up to four IDMAC channels. Signed-off-by: Philipp Zabel

gpu: ipu-v3: Move i.MX IPUv3 core driver out of staging

2014-06-04T09:06:52Z

The i.MX Image Processing Unit (IPU) contains a number of image processing blocks that sit right in the middle between DRM and V4L2. Some of the modules, such as Display Controller, Processor, and Interface (DC, DP, DI) or CMOS Sensor Interface (CSI) and their FIFOs could be assigned to either framework, but others, such as the dma controller (IDMAC) and image converter (IC) can be used by both. The IPUv3 core driver provides an internal API to access the modules, to be used by both DRM and V4L2 IPUv3 drivers. Signed-off-by: Lucas Stach Signed-off-by: Philipp Zabel Acked-by: Greg Kroah-Hartman