kernel/drivers/gpu/ipu-v3/ipu-dc.c, branch linux-6.2.y

drm/imx: make static read-only array channel_offsets const

2022-04-04T07:34:20Z

The static array channel_offsets is read-only so it make sense to make it const. Signed-off-by: Colin Ian King Signed-off-by: Philipp Zabel Link: https://lore.kernel.org/r/20220123223417.6244-1-colin.i.king@gmail.com

drm/imx: Add 8 pixel alignment fix

2021-05-10T14:39:54Z

Some standard resolutions like 1366x768 do not work properly with i.MX6 SoCs, since the horizontal resolution needs to be aligned to 8 pixels (so 1360x768 or 1368x768 would work). This patch allocates framebuffers allocated to 8 pixels. The extra time required to send the extra pixels are removed from the blank time. In order to expose the correct display size to userspace, the stride is increased without increasing the width. Without this patch systems with this display resolution hang indefinitely during boot up. Suggested-by: Boris Brezillon Signed-off-by: Sebastian Reichel Link: https://lore.kernel.org/r/20210428222953.235280-3-sebastian.reichel@collabora.com Signed-off-by: Philipp Zabel

treewide: Use fallthrough pseudo-keyword

2020-08-23T22:36:59Z

Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary fall-through markings when it is the case. [1] https://www.kernel.org/doc/html/v5.7/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through Signed-off-by: Gustavo A. R. Silva

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157

2019-05-30T18:26:37Z

Based on 3 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [graeme] [gregory] [gg]@[slimlogic] [co] [uk] [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] [based] [on] [twl6030]_[usb] [c] [author] [hema] [hk] [hemahk]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1105 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Allison Randal Reviewed-by: Richard Fontana Reviewed-by: Kate Stewart Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.202006027@linutronix.de Signed-off-by: Greg Kroah-Hartman

gpu: ipu-v3: ipu-dc: Remove unused 'di' variable

2017-10-04T10:18:56Z

The 'di' variable is never used inside ipu_dc_enable_channel(), so just remove it. This fixes the following build warning with W=1: drivers/gpu/ipu-v3/ipu-dc.c: In function 'ipu_dc_enable_channel': drivers/gpu/ipu-v3/ipu-dc.c:252:6: warning: variable 'di' set but not used [-Wunused-but-set-variable] Signed-off-by: Fabio Estevam Signed-off-by: Philipp Zabel

gpu: ipu-v3: remove IRQ dance on DC channel disable

2017-03-15T14:28:27Z

This has never worked properly, as the IRQ got retriggered immediately on unmask. Remove the IRQ wait dance, as it is apparently safe to disable the DC channel at any point in time. Signed-off-by: Lucas Stach Signed-off-by: Philipp Zabel

gpu: ipu-v3: ipu-dc: don't bug out on invalid bus_format

2016-07-12T16:26:05Z

If imx-drm is combined with a bridge or panel that requests an unsupported format, warn and use a default mapping instead of hanging the machine. The worst that can happen here are wrong colors. Signed-off-by: Philipp Zabel

drm/imx: atomic phase 1: Use transitional atomic CRTC and plane helpers

2016-07-12T16:23:47Z

Use the drm_plane_helper_update/disable() and drm_helper_crtc_mode_set() transitional atomic helpers. The crtc->mode_set_nofb callback is added so that the primary plane is no longer tied to the CRTC. Check/update logics are separated to make sure crtc->mode_set_nofb and plane->atomic_update are always successful. Also, some necessary logics are tweaked for a smooth transition. Signed-off-by: Liu Ying Acked-by: Daniel Vetter Signed-off-by: Philipp Zabel

gpu: ipu-v3: ipu-dc: Simplify display controller microcode setup

2016-03-01T07:33:38Z

This cleans up the display controller microcode setup in ipu_dc_init_sync a little bit. The microcode template words for DI0 and DI1 are properly separated to avoid a clash when DI1 is active in interlaced mode at the same time as DI0 in non-interlaced mode. A comment is added to explain the meaning of the sync counter. Signed-off-by: Philipp Zabel

gpu: imx: fix support for interlaced modes

2015-10-06T18:58:30Z

The support for interlaced video modes seems to be broken; we don't use anything other than the vtotal/htotal from the timing information to define the various sync counters. Freescale patches for interlaced video support contain an alternative sync counter setup, which we include here. This setup produces the hsync and vsync via the normal counter 2 and 3, but moves the display enable signal from counter 5 to counter 6. Therefore, we need to change the display controller setup as well. The corresponding Freescale patches for this change are: iMX6-HDMI-support-interlaced-display-mode.patch IPU-fine-tuning-the-interlace-display-timing-for-CEA.patch This produces a working interlace format output from the IPU. Tested-by: Philipp Zabel Reviewed-by: Fabio Estevam Signed-off-by: Russell King