<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/ipu-v3/ipu-dc.c, branch linux-4.16.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.16.y</id>
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<updated>2017-10-04T10:18:56Z</updated>
<entry>
<title>gpu: ipu-v3: ipu-dc: Remove unused 'di' variable</title>
<updated>2017-10-04T10:18:56Z</updated>
<author>
<name>Fabio Estevam</name>
<email>fabio.estevam@nxp.com</email>
</author>
<published>2017-09-17T01:03:22Z</published>
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<id>urn:sha1:e64b9189bfd58e215ee44159767b39b8cf6fa302</id>
<content type='text'>
The 'di' variable is never used inside ipu_dc_enable_channel(),
so just remove it.

This fixes the following build warning with W=1:

drivers/gpu/ipu-v3/ipu-dc.c: In function 'ipu_dc_enable_channel':
drivers/gpu/ipu-v3/ipu-dc.c:252:6: warning: variable 'di' set but not used [-Wunused-but-set-variable]

Signed-off-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: remove IRQ dance on DC channel disable</title>
<updated>2017-03-15T14:28:27Z</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2016-11-08T15:13:25Z</published>
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<id>urn:sha1:2212a780b9c515cd54a5707713307efab9896b4f</id>
<content type='text'>
This has never worked properly, as the IRQ got retriggered immediately
on unmask. Remove the IRQ wait dance, as it is apparently safe to disable
the DC channel at any point in time.

Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: ipu-dc: don't bug out on invalid bus_format</title>
<updated>2016-07-12T16:26:05Z</updated>
<author>
<name>Philipp Zabel</name>
<email>p.zabel@pengutronix.de</email>
</author>
<published>2016-07-06T09:06:18Z</published>
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<id>urn:sha1:b575b31387f64f63019c88a0ddbf1e0cc0cd8cd9</id>
<content type='text'>
If imx-drm is combined with a bridge or panel that requests an
unsupported format, warn and use a default mapping instead of
hanging the machine. The worst that can happen here are wrong
colors.

Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>drm/imx: atomic phase 1: Use transitional atomic CRTC and plane helpers</title>
<updated>2016-07-12T16:23:47Z</updated>
<author>
<name>Liu Ying</name>
<email>gnuiyl@gmail.com</email>
</author>
<published>2016-07-08T09:40:55Z</published>
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<id>urn:sha1:33f14235302f561b1db713c1bd8111a512bf2568</id>
<content type='text'>
Use the drm_plane_helper_update/disable() and drm_helper_crtc_mode_set()
transitional atomic helpers.  The crtc-&gt;mode_set_nofb callback is added
so that the primary plane is no longer tied to the CRTC.  Check/update
logics are separated to make sure crtc-&gt;mode_set_nofb and plane-&gt;atomic_update
are always successful.  Also, some necessary logics are tweaked for a smooth
transition.

Signed-off-by: Liu Ying &lt;gnuiyl@gmail.com&gt;
Acked-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>gpu: ipu-v3: ipu-dc: Simplify display controller microcode setup</title>
<updated>2016-03-01T07:33:38Z</updated>
<author>
<name>Philipp Zabel</name>
<email>p.zabel@pengutronix.de</email>
</author>
<published>2013-09-17T13:48:46Z</published>
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<id>urn:sha1:86bdb09f044e1604add914e94d4f472052780ad9</id>
<content type='text'>
This cleans up the display controller microcode setup in ipu_dc_init_sync
a little bit. The microcode template words for DI0 and DI1 are properly
separated to avoid a clash when DI1 is active in interlaced mode at the
same time as DI0 in non-interlaced mode.
A comment is added to explain the meaning of the sync counter.

Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>gpu: imx: fix support for interlaced modes</title>
<updated>2015-10-06T18:58:30Z</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2015-07-21T09:22:29Z</published>
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<id>urn:sha1:aefa627fa3f231c5d86aeb229f15e8478cb6e910</id>
<content type='text'>
The support for interlaced video modes seems to be broken; we don't use
anything other than the vtotal/htotal from the timing information to
define the various sync counters.

Freescale patches for interlaced video support contain an alternative
sync counter setup, which we include here.  This setup produces the
hsync and vsync via the normal counter 2 and 3, but moves the display
enable signal from counter 5 to counter 6.  Therefore, we need to
change the display controller setup as well.

The corresponding Freescale patches for this change are:
  iMX6-HDMI-support-interlaced-display-mode.patch
  IPU-fine-tuning-the-interlace-display-timing-for-CEA.patch

This produces a working interlace format output from the IPU.

Tested-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Reviewed-by: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>drm/imx: consolidate bus format variable names</title>
<updated>2015-03-31T09:59:34Z</updated>
<author>
<name>Philipp Zabel</name>
<email>p.zabel@pengutronix.de</email>
</author>
<published>2015-02-02T16:25:59Z</published>
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<id>urn:sha1:2872c8072aae65fa55cafea50e73d69d423df168</id>
<content type='text'>
This patch consolidates the different interface_pix_fmt, pixel_fmt, pix_fmt,
and pixfmt variables to a common name "bus_format" wherever they describe the
pixel format on the bus between display controller and encoder hardware.
At the same time, it renames imx_drm_panel_format to imx_drm_set_bus_format.

Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Tested-by: Emil Renner Berthing &lt;kernel@esmil.dk&gt;
</content>
</entry>
<entry>
<title>drm/imx: switch to use media bus formats</title>
<updated>2015-03-31T09:59:34Z</updated>
<author>
<name>Philipp Zabel</name>
<email>p.zabel@pengutronix.de</email>
</author>
<published>2014-12-02T16:51:36Z</published>
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<id>urn:sha1:a7c6e76feeb19de1a5cefa50ea6c0fc5ad45bbe1</id>
<content type='text'>
imx-drm internally misused the V4L2_PIX_FMT constants, which are supposed to
describe the pixel format of frame buffers in memory, to describe the pixel
format on the bus between the display controller and the encoder hardware.
Now that MEDIA_BUS_FMT constants are available to drm drivers, use those
instead.

Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Tested-by: Emil Renner Berthing &lt;kernel@esmil.dk&gt;
</content>
</entry>
<entry>
<title>Merge tag 'imx-drm-fixes-2015-01-28' of git://git.pengutronix.de/git/pza/linux into drm-next</title>
<updated>2015-02-11T05:35:26Z</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2015-02-11T05:35:26Z</published>
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<id>urn:sha1:85840c76d8ad18d978da44e8d2f27bb35b7159af</id>
<content type='text'>
imx-drm fixes for IPUv3 DC and i.MX5 IPUv3 IC and TVE

- Corrected handling of wait_for_completion_timeout return value
  when disabling IPUv3 DC channels
- Fixed error return value propagation in TVE mode_set
- Fixed IPUv3 register offsets for IC module on i.MX51 and i.MX53

* tag 'imx-drm-fixes-2015-01-28' of git://git.pengutronix.de/git/pza/linux:
  gpu: ipu-v3: Fix IC control register offset
  drm: imx: imx-tve: Check and propagate the errors
  gpu: ipu-v3: wait_for_completion_timeout does not return negative status
</content>
</entry>
<entry>
<title>gpu: ipu-v3: wait_for_completion_timeout does not return negative status</title>
<updated>2015-01-27T14:55:49Z</updated>
<author>
<name>Nicholas Mc Guire</name>
<email>der.herr@hofr.at</email>
</author>
<published>2015-01-19T11:38:11Z</published>
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<id>urn:sha1:af7537d3c8d0f894f6499376a538e8138ef188ee</id>
<content type='text'>
This fixes up the return value handling and the return type.

Signed-off-by: Nicholas Mc Guire &lt;der.herr@hofr.at&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
</feed>
