kernel/drivers/gpu/host1x/mipi.c, branch linux-4.1.y

gpu: host1x: mipi: Set MIPI_CAL_BIAS_PAD_CFG1 register

2014-11-13T15:11:57Z

During calibration, sets the "internal reference level for drive pull- down" to the value specified in the Tegra TRM. Signed-off-by: Sean Paul Signed-off-by: Thierry Reding

gpu: host1x: mipi: Calibrate clock lanes

2014-11-13T15:11:54Z

Include the clock lanes when calibrating the MIPI PHY on Tegra124 compatible devices. Signed-off-by: Sean Paul [treding@nvidia.com: bikeshedding] Signed-off-by: Thierry Reding

gpu: host1x: mipi: Preserve the contents of MIPI_CAL_CTRL

2014-11-13T15:11:51Z

By paving the CTRL reg value, the current code changes MIPI_CAL_PRESCALE ("Auto-cal calibration step prescale") from 1us to 0.1us (val=0). In the description for PHY's noise filter (MIPI_CAL_NOISE_FLT), the TRM states that if the value of the prescale is 0 (or 0.1us), the filter should be set between 2-5. However, the current code sets it to 0. For now, let's keep the prescale and filter values as-is, which is most likely the power-on-reset values of 0x2 and 0xa, respectively. Signed-off-by: Sean Paul Signed-off-by: Thierry Reding

gpu: host1x: mipi: Registers are 32 bits wide

2014-11-13T15:11:48Z

On 64-bit platforms an unsigned long would be 64 bit and cause unnecessary casting when being passed to writel() or returned from readl(). Make register values 32 bits wide to avoid that. Signed-off-by: Thierry Reding

gpu: host1x: Fix more sparse warnings

2013-12-19T08:29:51Z

Include the linux/host1x.h and dev.h headers so that function prototypes are visible to keep sparse from suggesting that their implementations be made static. Signed-off-by: Thierry Reding

gpu: host1x: Add MIPI pad calibration support

2013-12-19T08:29:43Z

This driver adds support to perform calibration of the MIPI pads for CSI and DSI. Signed-off-by: Thierry Reding