<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/host1x/hw/channel_hw.c, branch linux-4.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y</id>
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<updated>2017-10-20T12:19:52Z</updated>
<entry>
<title>gpu: host1x: Enable gather filter</title>
<updated>2017-10-20T12:19:52Z</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2017-09-28T12:50:40Z</published>
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<id>urn:sha1:2316f29fb57932e34a56998073246b8ec4c567f9</id>
<content type='text'>
The gather filter is a feature present on Tegra124 and newer where the
hardware prevents GATHERed command buffers from executing commands
normally reserved for the CDMA pushbuffer which is maintained by the
kernel driver.

This commit enables the gather filter on all supporting hardware.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Reviewed-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Enable Tegra186 syncpoint protection</title>
<updated>2017-10-20T12:19:52Z</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2017-09-28T12:50:39Z</published>
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<id>urn:sha1:c3f52220f276504dea5615cc78750ddc9f468389</id>
<content type='text'>
Since Tegra186 the Host1x hardware allows syncpoints to be assigned to
specific channels, preventing any other channels from incrementing
them.

Enable this feature where available and assign syncpoints to channels
when submitting a job. Syncpoints are currently never unassigned from
channels since that would require extra work and is unnecessary with
the current channel allocation model.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Reviewed-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Refactor channel allocation code</title>
<updated>2017-06-15T12:25:38Z</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2017-06-14T23:18:42Z</published>
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<id>urn:sha1:8474b02531c4881a762c52ef869c52429e38633f</id>
<content type='text'>
This is largely a rewrite of the Host1x channel allocation code, bringing
several changes:

- The previous code could deadlock due to an interaction
  between the 'reflock' mutex and CDMA timeout handling.
  This gets rid of the mutex.
- Support for more than 32 channels, required for Tegra186
- General refactoring, including better encapsulation
  of channel ownership handling into channel.c

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Reviewed-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Tested-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Whitespace cleanup for readability</title>
<updated>2016-06-23T09:59:30Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2016-06-23T09:35:50Z</published>
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<id>urn:sha1:0b8070d12ee2ef62e0b07213d843eb508fba966e</id>
<content type='text'>
Insert a number of blank lines in places where they increase readability
of the code. Also collapse various variable declarations to shorten some
functions and finally rewrite some code for readability.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Use unsigned int consistently for IDs</title>
<updated>2016-06-23T09:59:24Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2016-06-23T09:19:00Z</published>
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<id>urn:sha1:5c0d8d386ba67ce07bfddcebf05233e8606771ff</id>
<content type='text'>
IDs can never be negative so use unsigned int. In some instances an
explicitly sized type (such as u32) was used for no particular reason,
so turn those into unsigned int as well for consistency.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Use struct host1x_bo pointers in traces</title>
<updated>2014-11-13T15:11:32Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2014-06-12T11:14:50Z</published>
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<id>urn:sha1:b40d02bf96e05851d1d16b4a75f66a9e16cfb2fb</id>
<content type='text'>
Rather than cast to a u32 use the struct host1x_bo pointers directly.
This avoid annoying warnings for 64-bit builds.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Add syncpoint base support</title>
<updated>2013-10-31T08:55:48Z</updated>
<author>
<name>Arto Merilainen</name>
<email>amerilainen@nvidia.com</email>
</author>
<published>2013-10-14T12:21:53Z</published>
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<id>urn:sha1:f5a954fed9b3eb04973ede72c50c66157fa9e15b</id>
<content type='text'>
This patch adds support for hardware syncpoint bases. This creates
a simple mechanism to stall the command FIFO until an operation is
completed.

Signed-off-by: Arto Merilainen &lt;amerilainen@nvidia.com&gt;
Reviewed-by: Terje Bergstrom &lt;tbergstrom@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Use relative include paths</title>
<updated>2013-10-31T08:55:40Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2013-10-09T08:32:54Z</published>
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<id>urn:sha1:fc3be3e8fc8b3b6e800d6dc8ffb794e9d27ba5d2</id>
<content type='text'>
This is slightly safer than adding -Idrivers/gpu/host1x to cflags-y.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Expose syncpt and channel functionality</title>
<updated>2013-10-31T08:20:11Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2013-09-24T14:30:32Z</published>
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<id>urn:sha1:35d747a81d7eb824bd0c3476cd0c564b52ad5353</id>
<content type='text'>
Expose the buffer objects, syncpoint and channel functionality in the
public public header so that drivers can use them.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Make host1x header file public</title>
<updated>2013-10-31T08:20:10Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2013-09-24T11:59:01Z</published>
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<id>urn:sha1:e1e906448d2fc6f5a69e1967e00868f0cbfbb566</id>
<content type='text'>
In preparation to support host1x clients other than DRM, move this
header into a public location.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
</feed>
