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<title>kernel/drivers/gpu/drm/xe/xe_debugfs.c, branch master</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=master</id>
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<updated>2026-01-08T21:07:42Z</updated>
<entry>
<title>drm/xe: Update wedged.mode only after successful reset policy change</title>
<updated>2026-01-08T21:07:42Z</updated>
<author>
<name>Lukasz Laguna</name>
<email>lukasz.laguna@intel.com</email>
</author>
<published>2026-01-07T17:47:39Z</published>
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<id>urn:sha1:0f13dead4e0385859f5c9c3625a19df116b389d3</id>
<content type='text'>
Previously, the driver's internal wedged.mode state was updated without
verifying whether the corresponding engine reset policy update in GuC
succeeded. This could leave the driver reporting a wedged.mode state
that doesn't match the actual reset behavior programmed in GuC.

With this change, the reset policy is updated first, and the driver's
wedged.mode state is modified only if the policy update succeeds on all
available GTs.

This patch also introduces two functional improvements:

 - The policy is sent to GuC only when a change is required. An update
   is needed only when entering or leaving XE_WEDGED_MODE_UPON_ANY_HANG,
   because only in that case the reset policy changes. For example,
   switching between XE_WEDGED_MODE_UPON_CRITICAL_ERROR and
   XE_WEDGED_MODE_NEVER doesn't affect the reset policy, so there is no
   need to send the same value to GuC.

 - An inconsistent_reset flag is added to track cases where reset policy
   update succeeds only on a subset of GTs. If such inconsistency is
   detected, future wedged mode configuration will force a retry of the
   reset policy update to restore a consistent state across all GTs.

Fixes: 6b8ef44cc0a9 ("drm/xe: Introduce the wedged_mode debugfs")
Signed-off-by: Lukasz Laguna &lt;lukasz.laguna@intel.com&gt;
Link: https://patch.msgid.link/20260107174741.29163-3-lukasz.laguna@intel.com
Reviewed-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/xe: Validate wedged_mode parameter and define enum for modes</title>
<updated>2026-01-08T21:07:07Z</updated>
<author>
<name>Lukasz Laguna</name>
<email>lukasz.laguna@intel.com</email>
</author>
<published>2026-01-07T17:47:38Z</published>
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<id>urn:sha1:17d3c3365ba9e52596855d6acb71c3159be1b9c3</id>
<content type='text'>
Check correctness of the wedged_mode parameter input to ensure only
supported values are accepted. Additionally, replace magic numbers with
a clearly defined enum.

Signed-off-by: Lukasz Laguna &lt;lukasz.laguna@intel.com&gt;
Reviewed-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Link: https://patch.msgid.link/20260107174741.29163-2-lukasz.laguna@intel.com
Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/xe: Add debugfs knobs to control long running workload timeslicing</title>
<updated>2025-12-15T21:53:32Z</updated>
<author>
<name>Matthew Brost</name>
<email>matthew.brost@intel.com</email>
</author>
<published>2025-12-12T18:28:43Z</published>
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<id>urn:sha1:6e608bff259fd1eae5d381c5eb16b88413e16209</id>
<content type='text'>
Add debugfs knobs to control timeslicing for long-running workloads,
allowing quick tuning of values when running benchmarks.

Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Reviewed-by: Thomas Hellström &lt;thomas.hellstrom@linux.intel.com&gt;
Link: https://patch.msgid.link/20251212182847.1683222-4-matthew.brost@intel.com
</content>
</entry>
<entry>
<title>drm/xe: Add debugfs support for page reclamation</title>
<updated>2025-12-13T00:59:10Z</updated>
<author>
<name>Brian Nguyen</name>
<email>brian3.nguyen@intel.com</email>
</author>
<published>2025-12-12T21:32:36Z</published>
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<id>urn:sha1:13d99b01c0c9d93afb9413cc97a05854ae40f6ab</id>
<content type='text'>
Allow for runtime modification to page reclamation feature through
debugfs configuration. This parameter will only take effect if the
platform supports the page reclamation feature by default.

v2:
 - Minor comment tweaks. (Shuicheng)
 - Convert to kstrtobool_from_user. (Michal)
 - Only expose page reclaim file if page reclaim flag
   initially supported and with that, remove
   xe_match_desc usage. (Michal)

Signed-off-by: Brian Nguyen &lt;brian3.nguyen@intel.com&gt;
Reviewed-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Reviewed-by: Shuicheng Lin &lt;shuicheng.lin@intel.com&gt;
Cc: Michal Wajdeczko &lt;michal.wajdeczko@intel.com&gt;
Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Link: https://patch.msgid.link/20251212213225.3564537-22-brian3.nguyen@intel.com
</content>
</entry>
<entry>
<title>drm/xe/multi_queue: Add multi_queue_enable_mask to gt information</title>
<updated>2025-12-12T03:20:30Z</updated>
<author>
<name>Niranjana Vishwanathapura</name>
<email>niranjana.vishwanathapura@intel.com</email>
</author>
<published>2025-12-11T01:02:49Z</published>
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<id>urn:sha1:ee26c3b2765a34d1055660cbfd4f00766dd25412</id>
<content type='text'>
Add multi_queue_enable_mask field to the gt information structure
which is bitmask of all engine classes with multi queue support
enabled.

v2: Rename multi_queue_enable_mask to multi_queue_engine_class_mask
    (Matt Brost)

Signed-off-by: Niranjana Vishwanathapura &lt;niranjana.vishwanathapura@intel.com&gt;
Reviewed-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Link: https://patch.msgid.link/20251211010249.1647839-20-niranjana.vishwanathapura@intel.com
</content>
</entry>
<entry>
<title>drm/xe: Move VRAM MM debugfs creation to tile level</title>
<updated>2025-11-27T13:43:07Z</updated>
<author>
<name>Piotr Piórkowski</name>
<email>piotr.piorkowski@intel.com</email>
</author>
<published>2025-11-27T07:36:43Z</published>
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<id>urn:sha1:8e2610d9a5edefb99b1a708796a8f733358e5898</id>
<content type='text'>
Previously, VRAM TTM resource manager debugfs entries (vram0_mm / vram1_mm)
were created globally in the XE debugfs root directory. But technically,
each tile has an associated VRAM TTM manager, which it can own.
Let's create VRAM memory manager debugfs entries directly under each tile's
debugfs directory for better alignment with the per-tile memory layout.

Signed-off-by: Piotr Piórkowski &lt;piotr.piorkowski@intel.com&gt;
Reviewed-by: Stuart Summers &lt;stuart.summers@intel.com&gt;
Link: https://patch.msgid.link/20251127073643.144379-1-piotr.piorkowski@intel.com
Signed-off-by: Michał Winiarski &lt;michal.winiarski@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/xe/debugfs: Use scope-based runtime PM</title>
<updated>2025-11-19T19:58:58Z</updated>
<author>
<name>Matt Roper</name>
<email>matthew.d.roper@intel.com</email>
</author>
<published>2025-11-18T16:44:06Z</published>
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<id>urn:sha1:423fb66fac7dbb5ee2b26c40e0d21c0ffb0d7533</id>
<content type='text'>
Switch the debugfs code to use scope-based runtime PM where possible,
for consistency with other parts of the driver.

v2:
 - Drop unnecessary 'ret' variables.  (Gustavo)

Reviewed-by: Gustavo Sousa &lt;gustavo.sousa@intel.com&gt;
Link: https://patch.msgid.link/20251118164338.3572146-56-matthew.d.roper@intel.com
Signed-off-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/xe/xe_debugfs: Expose G7 package state residency counter through debugfs</title>
<updated>2025-10-29T15:17:11Z</updated>
<author>
<name>Mohammed Thasleem</name>
<email>mohammed.thasleem@intel.com</email>
</author>
<published>2025-10-16T00:12:19Z</published>
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<id>urn:sha1:3cc0bce86e680b7170810352eb200dfc77d87e69</id>
<content type='text'>
Add G7 package state residency counter in debugfs alongside existing
G2,G6,G8,G10 states for complete power state visibility.

Signed-off-by: Mohammed Thasleem &lt;mohammed.thasleem@intel.com&gt;
Reviewed-by: Karthik Poosa &lt;karthik.poosa@intel.com&gt;
Link: https://patch.msgid.link/20251016001219.37684-1-mohammed.thasleem@intel.com
Signed-off-by: Lucas De Marchi &lt;lucas.demarchi@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/xe: Sort include files alphabetically.</title>
<updated>2025-10-13T14:18:20Z</updated>
<author>
<name>Arun Abhishek Chowhan</name>
<email>arun.abhishek.chowhan@intel.com</email>
</author>
<published>2025-10-13T09:59:14Z</published>
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<id>urn:sha1:64d00d41f57bf2228ed6c217c8e263440a4248df</id>
<content type='text'>
Sort the include lines alphabetically, no impact on code behavior.

Signed-off-by: Arun Abhishek Chowhan &lt;arun.abhishek.chowhan@intel.com&gt;
Reviewed-by: Nitin Gote &lt;nitin.r.gote@intel.com&gt;
Link: https://lore.kernel.org/r/20251013095914.3742505-1-arun.abhishek.chowhan@intel.com
Signed-off-by: Lucas De Marchi &lt;lucas.demarchi@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/xe/xe_late_bind_fw: Fix and simplify parsing user input</title>
<updated>2025-10-06T17:24:15Z</updated>
<author>
<name>Michal Wajdeczko</name>
<email>michal.wajdeczko@intel.com</email>
</author>
<published>2025-10-02T19:27:36Z</published>
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<id>urn:sha1:71f1939e0d9e6702c0424c31521b72b7f025e6dd</id>
<content type='text'>
Code was wrongly passing sizeof(uval) as the number base to use,
and unlike other debugfs entries that represent bool data, it
wasn't using the dedicated function to parse user input as bool.

Signed-off-by: Michal Wajdeczko &lt;michal.wajdeczko@intel.com&gt;
Cc: Badal Nilawar &lt;badal.nilawar@intel.com&gt;
Cc: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Reviewed-by: Jonathan Cavitt &lt;jonathan.cavitt@intel.com&gt;
Link: https://lore.kernel.org/r/20251002192736.203186-1-michal.wajdeczko@intel.com
</content>
</entry>
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