<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/vc4/vc4_validate_shaders.c, branch linux-4.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y</id>
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<updated>2018-04-09T19:42:08Z</updated>
<entry>
<title>drm/vc4: Fix memory leak during BO teardown</title>
<updated>2018-04-09T19:42:08Z</updated>
<author>
<name>Daniel J Blueman</name>
<email>daniel@quora.org</email>
</author>
<published>2018-04-02T07:10:35Z</published>
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<id>urn:sha1:c0db1b677e1d584fab5d7ac76a32e1c0157542e0</id>
<content type='text'>
During BO teardown, an indirect list 'uniform_addr_offsets' wasn't being
freed leading to leaking many 128B allocations. Fix the memory leak by
releasing it at teardown time.

Cc: stable@vger.kernel.org
Fixes: 6d45c81d229d ("drm/vc4: Add support for branching in shader validation.")
Signed-off-by: Daniel J Blueman &lt;daniel@quora.org&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
Reviewed-by: Eric Anholt &lt;eric@anholt.net&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20180402071035.25356-1-daniel@quora.org
</content>
</entry>
<entry>
<title>drm/vc4: Demote user-accessible DRM_ERROR paths to DRM_DEBUG.</title>
<updated>2017-08-08T20:20:11Z</updated>
<author>
<name>Eric Anholt</name>
<email>eric@anholt.net</email>
</author>
<published>2017-07-25T16:27:32Z</published>
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<id>urn:sha1:fb95992af1d779806da9a380b14f76ad13764c2f</id>
<content type='text'>
Userspace shouldn't be able to spam dmesg by passing bad arguments.
This has particularly become an issues since we started using a bad
argument to set_tiling to detect if set_tiling was supported.

Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
Fixes: 83753117f1de ("drm/vc4: Add get/set tiling ioctls.")
Link: https://patchwork.freedesktop.org/patch/msgid/20170725162733.28007-1-eric@anholt.net
Reviewed-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>drm/vc4: Extend and edit documentation for output from the RST</title>
<updated>2017-02-28T20:51:49Z</updated>
<author>
<name>Eric Anholt</name>
<email>eric@anholt.net</email>
</author>
<published>2017-02-27T20:11:43Z</published>
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<id>urn:sha1:f6c01530fd987eb70e051580d831ac04ef920352</id>
<content type='text'>
I had written most of my comments as if I was describing the
individual code files the way I used to for doxygen, while for RST we
want to describe things in a more chapter/section way where there's no
obvious relation to .c files.

Additionally, several of the files had stub descriptions that I've
taken this opportunity to extend.

Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
Acked-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20170227201144.10970-4-eric@anholt.net
</content>
</entry>
<entry>
<title>drm/vc4: Add fragment shader threading support</title>
<updated>2016-11-16T21:25:26Z</updated>
<author>
<name>Jonas Pfeil</name>
<email>pfeiljonas@gmx.de</email>
</author>
<published>2016-11-07T23:18:39Z</published>
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<id>urn:sha1:c778cc5df944291dcdb1ca7a6bb781fbc22550c5</id>
<content type='text'>
FS threading brings performance improvements of 0-20% in glmark2.

The validation code checks for thread switch signals and ensures that
the registers of the other thread are not touched, and that our clamps
are not live across thread switches.  It also checks that the
threading and branching instructions do not interfere.

(Original patch by Jonas, changes by anholt for style cleanup,
removing validation the kernel doesn't need to do, and adding the flag
for userspace).

v2: Minor style fixes from checkpatch.

Signed-off-by: Jonas Pfeil &lt;pfeiljonas@gmx.de&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
</entry>
<entry>
<title>drm/vc4: Fix termination of the initial scan for branch targets.</title>
<updated>2016-11-04T01:48:07Z</updated>
<author>
<name>Eric Anholt</name>
<email>eric@anholt.net</email>
</author>
<published>2016-10-20T23:48:12Z</published>
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<id>urn:sha1:457e67a728696c4f8e6423c64e93def50530db9a</id>
<content type='text'>
The loop is scanning until the original max_ip (size of the BO), but
we want to not examine any code after the PROG_END's delay slots.
There was a block trying to do that, except that we had some early
continue statements if the signal wasn't a PROG_END or a BRANCH.

The failure mode would be that a valid shader is rejected because some
undefined memory after the PROG_END slots is parsed as a branch and
the rest of its setup is illegal.  I haven't seen this in the wild,
but valgrind was complaining when about this up in the userland
simulator mode.

Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
</entry>
<entry>
<title>drm/vc4: Allow some more signals to be packed with uniform resets.</title>
<updated>2016-08-30T21:01:21Z</updated>
<author>
<name>Eric Anholt</name>
<email>eric@anholt.net</email>
</author>
<published>2016-08-30T20:57:38Z</published>
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<id>urn:sha1:313a61d30761217ce4383018de1cc0d5d503a376</id>
<content type='text'>
The intent was to make sure people don't sneak in a small immediate or
something to change the interpretation of the uniform update args, but
these signals are just fine.

Fixes a validation failure in the current X server on some Render
operation.

Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
</entry>
<entry>
<title>drm/vc4: Fix a "the the" typo in a comment.</title>
<updated>2016-07-15T22:19:52Z</updated>
<author>
<name>Eric Anholt</name>
<email>eric@anholt.net</email>
</author>
<published>2016-07-02T16:58:41Z</published>
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<id>urn:sha1:a20d5fa61c32a0c94d237da642326db2ef3c7433</id>
<content type='text'>
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
</entry>
<entry>
<title>drm/vc4: Add support for branching in shader validation.</title>
<updated>2016-07-15T22:19:50Z</updated>
<author>
<name>Eric Anholt</name>
<email>eric@anholt.net</email>
</author>
<published>2016-07-02T19:17:10Z</published>
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<id>urn:sha1:6d45c81d229d71da54d374143e7d6abad4c0cf31</id>
<content type='text'>
We're already checking that branch instructions are between the start
of the shader and the proper PROG_END sequence.  The other thing we
need to make branching safe is to verify that the shader doesn't read
past the end of the uniforms stream.

To do that, we require that at any basic block reading uniforms have
the following instructions:

load_imm temp, &lt;next offset within uniform stream&gt;
add unif_addr, temp, unif

The instructions are generated by userspace, and the kernel verifies
that the load_imm is of the expected offset, and that the add adds it
to a uniform.  We track which uniform in the stream that is, and at
draw call time fix up the uniform stream to have the address of the
start of the shader's uniforms at that location.

Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
</entry>
<entry>
<title>drm/vc4: Add a bitmap of branch targets during shader validation.</title>
<updated>2016-07-15T22:19:12Z</updated>
<author>
<name>Eric Anholt</name>
<email>eric@anholt.net</email>
</author>
<published>2016-07-02T17:10:24Z</published>
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<id>urn:sha1:93aa9ae3e5523e49e4e5abacd4dbee0e4ab2d931</id>
<content type='text'>
This isn't used yet, it's just a first step toward loop validation.
During the main parsing of instructions, we need to know when we hit a
new basic block so that we can reset validated state.

v2: Fix a stray semicolon after an if block.  (caught by kbuild test).

Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
</entry>
<entry>
<title>drm/vc4: Move validation's current/max ip into the validation struct.</title>
<updated>2016-07-14T15:09:27Z</updated>
<author>
<name>Eric Anholt</name>
<email>eric@anholt.net</email>
</author>
<published>2016-07-02T16:57:07Z</published>
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<id>urn:sha1:d0566c2a2f2baacefe1eb75be8a001fdd6fe84a3</id>
<content type='text'>
Reduces the argument count for some of the functions, and will be used
more with the upcoming looping support.

Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
</entry>
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