<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/vc4/vc4_validate.c, branch linux-4.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y</id>
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<updated>2018-03-16T22:51:52Z</updated>
<entry>
<title>drm/vc4_validate: Remove VLA usage</title>
<updated>2018-03-16T22:51:52Z</updated>
<author>
<name>Gustavo A. R. Silva</name>
<email>gustavo@embeddedor.com</email>
</author>
<published>2018-03-13T14:31:51Z</published>
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<id>urn:sha1:0126b23c552c2bf9aa62a6cabce8c10e983ef436</id>
<content type='text'>
In preparation to enabling -Wvla, remove VLA. In this particular
case use macro ARRAY_SIZE so the length of array _bo_ can be
computed at preprocessing time.

The use of stack Variable Length Arrays needs to be avoided, as they
can be a vector for stack exhaustion, which can be both a runtime bug
or a security flaw. Also, in general, as code evolves it is easy to
lose track of how big a VLA can get. Thus, we can end up having runtime
failures that are hard to debug.

Also, fixed as part of the directive to remove all VLAs from
the kernel: https://lkml.org/lkml/2018/3/7/621

Signed-off-by: Gustavo A. R. Silva &lt;gustavo@embeddedor.com&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
Reviewed-by: Eric Anholt &lt;eric@anholt.net&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20180313143151.GA27486@embeddedgus
</content>
</entry>
<entry>
<title>drm/vc4: Demote user-accessible DRM_ERROR paths to DRM_DEBUG.</title>
<updated>2017-08-08T20:20:11Z</updated>
<author>
<name>Eric Anholt</name>
<email>eric@anholt.net</email>
</author>
<published>2017-07-25T16:27:32Z</published>
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<id>urn:sha1:fb95992af1d779806da9a380b14f76ad13764c2f</id>
<content type='text'>
Userspace shouldn't be able to spam dmesg by passing bad arguments.
This has particularly become an issues since we started using a bad
argument to set_tiling to detect if set_tiling was supported.

Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
Fixes: 83753117f1de ("drm/vc4: Add get/set tiling ioctls.")
Link: https://patchwork.freedesktop.org/patch/msgid/20170725162733.28007-1-eric@anholt.net
Reviewed-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>drm/vc4: fix spelling mistake: "dimesions" -&gt; "dimensions"</title>
<updated>2017-05-16T16:42:20Z</updated>
<author>
<name>Colin Ian King</name>
<email>colin.king@canonical.com</email>
</author>
<published>2017-05-14T17:00:16Z</published>
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<id>urn:sha1:fdb888de9ef922c01c1a4a846a2498f572b8dcf4</id>
<content type='text'>
Trivial fix to spelling mistake in DRM_ERROR message and split
over two lines to clean up a "line over 80 characters" checkpatch
warning.

Signed-off-by: Colin Ian King &lt;colin.king@canonical.com&gt;
Reviewed-by: Eric Anholt &lt;eric@anholt.net&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20170514170016.6802-1-colin.king@canonical.com
</content>
</entry>
<entry>
<title>drm/vc4: Allow using more than 256MB of CMA memory.</title>
<updated>2017-04-18T21:32:20Z</updated>
<author>
<name>Eric Anholt</name>
<email>eric@anholt.net</email>
</author>
<published>2017-03-27T23:10:25Z</published>
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<id>urn:sha1:553c942f8b2cbc7394b4d4fa2f848b23a8f07451</id>
<content type='text'>
Until now, we've had to limit Raspberry Pi to 256MB of CMA memory to
keep from triggering the hardware addressing bug between the tile
binner and the tile alloc memory (where the top 4 bits come from the
tile state data array's address).

To work around that and allow more memory to be reserved for graphics,
allocate a single BO to store tile state data arrays and tile
alloc/overflow memory while the GPU is active, and make sure that that
one BO doesn't happen to cross a 256MB boundary.  With that in place,
we can allocate textures and shaders anywhere in system memory (still
contiguous, of course).

Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20170327231025.19391-1-eric@anholt.net
Reviewed-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>drm/vc4: Extend and edit documentation for output from the RST</title>
<updated>2017-02-28T20:51:49Z</updated>
<author>
<name>Eric Anholt</name>
<email>eric@anholt.net</email>
</author>
<published>2017-02-27T20:11:43Z</published>
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<id>urn:sha1:f6c01530fd987eb70e051580d831ac04ef920352</id>
<content type='text'>
I had written most of my comments as if I was describing the
individual code files the way I used to for doxygen, while for RST we
want to describe things in a more chapter/section way where there's no
obvious relation to .c files.

Additionally, several of the files had stub descriptions that I've
taken this opportunity to extend.

Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
Acked-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20170227201144.10970-4-eric@anholt.net
</content>
</entry>
<entry>
<title>drm/vc4: Convert existing documentation to actual kerneldoc.</title>
<updated>2017-02-28T20:51:48Z</updated>
<author>
<name>Eric Anholt</name>
<email>eric@anholt.net</email>
</author>
<published>2017-02-27T20:11:41Z</published>
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<id>urn:sha1:72f793f14afcec9697fadb8cd4e5d33327b108cd</id>
<content type='text'>
I'm going to hook vc4 up to the sphinx build, so clean up its comments
to not generate warnings when we do.

Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
Acked-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20170227201144.10970-2-eric@anholt.net
</content>
</entry>
<entry>
<title>drm/vc4: Add fragment shader threading support</title>
<updated>2016-11-16T21:25:26Z</updated>
<author>
<name>Jonas Pfeil</name>
<email>pfeiljonas@gmx.de</email>
</author>
<published>2016-11-07T23:18:39Z</published>
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<id>urn:sha1:c778cc5df944291dcdb1ca7a6bb781fbc22550c5</id>
<content type='text'>
FS threading brings performance improvements of 0-20% in glmark2.

The validation code checks for thread switch signals and ensures that
the registers of the other thread are not touched, and that our clamps
are not live across thread switches.  It also checks that the
threading and branching instructions do not interfere.

(Original patch by Jonas, changes by anholt for style cleanup,
removing validation the kernel doesn't need to do, and adding the flag
for userspace).

v2: Minor style fixes from checkpatch.

Signed-off-by: Jonas Pfeil &lt;pfeiljonas@gmx.de&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
</entry>
<entry>
<title>drm/vc4: Add support for rendering with ETC1 textures.</title>
<updated>2016-11-04T01:55:46Z</updated>
<author>
<name>Eric Anholt</name>
<email>eric@anholt.net</email>
</author>
<published>2016-11-04T01:53:10Z</published>
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<id>urn:sha1:7154d76fedf549607afbc0d13db9aaf02da5cebf</id>
<content type='text'>
The validation for it ends up being quite simple, but I hadn't got
around to it before merging the driver.  For backwards compatibility,
we also need to add a flag so that the userspace GL driver can easily
tell if the kernel will allow ETC1 textures (on an old kernel, it will
continue to convert to RGBA8)

Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
</entry>
<entry>
<title>drm/vc4: Fix races when the CS reads from render targets.</title>
<updated>2016-10-06T18:53:50Z</updated>
<author>
<name>Eric Anholt</name>
<email>eric@anholt.net</email>
</author>
<published>2016-09-27T16:03:13Z</published>
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<id>urn:sha1:7edabee06a5622190d59689a64f5e17d1c343cc3</id>
<content type='text'>
With the introduction of bin/render pipelining, the previous job may
not be completed when we start binning the next one.  If the previous
job wrote our VBO, IB, or CS textures, then the binning stage might
get stale or uninitialized results.

Fixes the major rendering failure in glmark2 -b terrain.

Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
Fixes: ca26d28bbaa3 ("drm/vc4: improve throughput by pipelining binning and rendering jobs")
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/vc4: Add support for branching in shader validation.</title>
<updated>2016-07-15T22:19:50Z</updated>
<author>
<name>Eric Anholt</name>
<email>eric@anholt.net</email>
</author>
<published>2016-07-02T19:17:10Z</published>
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<id>urn:sha1:6d45c81d229d71da54d374143e7d6abad4c0cf31</id>
<content type='text'>
We're already checking that branch instructions are between the start
of the shader and the proper PROG_END sequence.  The other thing we
need to make branching safe is to verify that the shader doesn't read
past the end of the uniforms stream.

To do that, we require that at any basic block reading uniforms have
the following instructions:

load_imm temp, &lt;next offset within uniform stream&gt;
add unif_addr, temp, unif

The instructions are generated by userspace, and the kernel verifies
that the load_imm is of the expected offset, and that the add adds it
to a uniform.  We track which uniform in the stream that is, and at
draw call time fix up the uniform stream to have the address of the
start of the shader's uniforms at that location.

Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
</entry>
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