<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/tegra/vic.c, branch linux-5.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y'/>
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<updated>2019-03-22T13:08:55Z</updated>
<entry>
<title>drm/tegra: vic: Fix implicit function declaration warning</title>
<updated>2019-03-22T13:08:55Z</updated>
<author>
<name>Anders Roxell</name>
<email>anders.roxell@linaro.org</email>
</author>
<published>2019-02-18T11:00:50Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=509869a2fec36ecb2b841180915995f41d5a0219'/>
<id>urn:sha1:509869a2fec36ecb2b841180915995f41d5a0219</id>
<content type='text'>
When CONFIG_IOMMU_API isn't set the following warnings pops up:

drivers/gpu/drm/tegra/vic.c: In function ‘vic_boot’:
drivers/gpu/drm/tegra/vic.c:110:31: error: implicit declaration of function ‘dev_iommu_fwspec_get’; did you mean ‘iommu_fwspec_free’? [-Werror=implicit-function-declaration]
   struct iommu_fwspec *spec = dev_iommu_fwspec_get(vic-&gt;dev);
                               ^~~~~~~~~~~~~~~~~~~~
                               iommu_fwspec_free
drivers/gpu/drm/tegra/vic.c:110:31: warning: initialization of ‘struct iommu_fwspec *’ from ‘int’ makes pointer from integer without a cast [-Wint-conversion]
drivers/gpu/drm/tegra/vic.c:117:19: error: ‘struct iommu_fwspec’ has no member named ‘num_ids’
   if (spec &amp;&amp; spec-&gt;num_ids &gt; 0) {
                   ^~
drivers/gpu/drm/tegra/vic.c:118:16: error: ‘struct iommu_fwspec’ has no member named ‘ids’
    value = spec-&gt;ids[0] &amp; 0xffff;
                ^~

Rework so that its inside a '#ifdef CONFIG_IOMMU_API' block.

Fixes: f3779cb190a5 ("drm/tegra: vic: Support stream ID register programming")
Signed-off-by: Anders Roxell &lt;anders.roxell@linaro.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: vic: Support stream ID register programming</title>
<updated>2019-02-07T17:29:01Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-02-01T13:28:36Z</published>
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<id>urn:sha1:f3779cb190a5a12d2e26fd5af724fb1384a9144f</id>
<content type='text'>
The version of VIC found in Tegra186 and later incorporates improvements
with regards to context isolation. As part of those improvements, stream
ID registers were added that allow to specify separate stream IDs for
the Falcon microcontroller and the VIC memory interface.

While it is possible to also set the stream ID dynamically at runtime to
allow userspace contexts to be completely separated, this commit doesn't
implement that yet. Instead, the static VIC stream ID is programmed when
the Falcon is booted. This ensures that memory accesses by the Falcon or
the VIC are properly translated via the SMMU.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: vic: Do not clear driver data</title>
<updated>2019-02-07T17:29:00Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-02-01T13:28:35Z</published>
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<id>urn:sha1:3ff41673d5c6842e6668f95b0a14e5f6a74d043f</id>
<content type='text'>
Upon driver failure, the driver core will take care of clearing the
driver data, so there's no need to do so explicitly in the driver.

Reviewed-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: vic: Load firmware on demand</title>
<updated>2019-02-07T17:28:59Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-02-01T13:28:32Z</published>
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<id>urn:sha1:77a0b09dd993c83ee7c770cc704e9bec18fd19c7</id>
<content type='text'>
Loading the firmware requires an allocation of IOVA space to make sure
that the VIC's Falcon microcontroller can read the firmware if address
translation via the SMMU is enabled.

However, the allocation currently happens at a time where the geometry
of an IOMMU domain may not have been initialized yet. This happens for
example on Tegra186 and later where an ARM SMMU is used. Domains which
are created by the ARM SMMU driver postpone the geometry setup until a
device is attached to the domain. This is because IOMMU domains aren't
attached to a specific IOMMU instance at allocation time and hence the
input address space, which defines the geometry, is not known yet.

Work around this by postponing the firmware load until it is needed at
the time where a channel is opened to the VIC. At this time the shared
IOMMU domain's geometry has been properly initialized.

As a byproduct this allows the Tegra DRM to be created in the absence
of VIC firmware, since the VIC initialization no longer fails if the
firmware can't be found.

Based on an earlier patch by Dmitry Osipenko &lt;digetx@gmail.com&gt;.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Reviewed-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: vic: Add Tegra194 support</title>
<updated>2018-11-29T16:11:50Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2018-10-26T08:59:38Z</published>
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<id>urn:sha1:d6b9bc025859521dae719d8fb8278b0c39b34861</id>
<content type='text'>
The Video Image Composer (VIC) generation found on Tegra194 is backwards
compatible with its predecessor found on Tegra186.

Reviewed-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: vic: Implement explicit reset support</title>
<updated>2018-11-29T16:11:09Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2018-11-23T12:06:37Z</published>
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<id>urn:sha1:0dc34e19f66eb84744af2fea4235302da39fd7e7</id>
<content type='text'>
Tegra supports generic PM domains on 64-bit ARM, and if that is enabled,
the power domain code will make sure that resets are asserted and
deasserted at appropriate points in time.

If generic PM domains are not implemented, such as on 32-bit Tegra, the
resets need to be asserted and deasserted explicitly by the driver.

Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: vic: Track interface version</title>
<updated>2018-05-18T20:00:41Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2018-05-16T15:08:04Z</published>
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<id>urn:sha1:acae8a9d054daa75a01e34b18f3627e6df330622</id>
<content type='text'>
Set the interface version implemented by the VIC module. This allows
userspace to pass the correct command stream when programming the VIC
module.

Reviewed-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Use IOMMU groups</title>
<updated>2017-12-21T13:52:36Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2017-10-12T15:43:33Z</published>
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<id>urn:sha1:bc8828bd08bd2a645caeb64d299d67faca7a3b4f</id>
<content type='text'>
In order to support IOMMUs more generically and transparently handle the
ARM SMMU on Tegra186, move to using groups instead of devices for domain
attachment. An IOMMU group is a set of devices that share the same IOMMU
domain and is therefore a good match to represent what Tegra DRM needs.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: vic: Properly align arguments</title>
<updated>2017-12-13T12:42:09Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2017-11-08T12:22:17Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=9b49f674eb205f9a01638ffc4b6add49741955ad'/>
<id>urn:sha1:9b49f674eb205f9a01638ffc4b6add49741955ad</id>
<content type='text'>
Properly align function arguments on subsequent lines with the first
argument on the first line.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: vic: Use of_device_get_match_data()</title>
<updated>2017-10-20T12:19:54Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2017-08-21T16:03:27Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=829ce7a68f20054b9cda762fbbf662b33ca26756'/>
<id>urn:sha1:829ce7a68f20054b9cda762fbbf662b33ca26756</id>
<content type='text'>
Avoid some boilerplate by calling of_device_get_match_data() instead of
open-coding the equivalent in the driver.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
</feed>
