<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/tegra/gr3d.c, branch linux-5.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-5.1.y</id>
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<updated>2018-05-18T20:00:25Z</updated>
<entry>
<title>drm/tegra: gr3d: Track interface version</title>
<updated>2018-05-18T20:00:25Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2018-05-16T15:07:38Z</published>
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<id>urn:sha1:33f150ea82ff029ec7e00345c6fbf00e44a8fd60</id>
<content type='text'>
Set the interface version implemented by the gr3d module. This allows
userspace to pass the correct command stream when programming the gr3d
module.

Reviewed-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Tested-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Refactor IOMMU attach/detach</title>
<updated>2018-05-17T12:08:40Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2018-05-04T13:02:24Z</published>
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<id>urn:sha1:0c407de5ed1a329468122cbf4f3e727e0c1e3f36</id>
<content type='text'>
Attaching to and detaching from an IOMMU uses the same code sequence in
every driver, so factor it out into separate helpers.

Reviewed-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: gr3d: Properly clean up resources</title>
<updated>2018-05-17T12:03:30Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2018-05-04T13:08:49Z</published>
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<id>urn:sha1:230630bd3834af0ea6ec75354ec21819de148ee1</id>
<content type='text'>
Failure to register the Tegra DRM client would leak the resources. Move
cleanup code to error unwinding gotos to fix that and share the cleanup
code with the other error paths.

Reviewed-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: gr3d: Add IOMMU support</title>
<updated>2018-05-04T12:20:09Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-05-03T23:47:21Z</published>
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<id>urn:sha1:c9ac52175b38e7f22fe37b9f943973d9095e53b7</id>
<content type='text'>
Attach GR3D to the displays IOMMU group in order to provide GR3D access
to BO's IOVA.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: syncpt: Request syncpoints per client</title>
<updated>2017-10-20T12:19:51Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2017-08-30T10:48:31Z</published>
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<id>urn:sha1:617dd7cc490b72345277e2666c8ed34d4f47f0da</id>
<content type='text'>
Rather than request syncpoints for a struct device *, request them for a
struct host1x_client *. This is important because subsequent patches are
going to break the assumption that host1x will always be the parent for
devices requesting a syncpoint. It's also a more natural choice because
host1x clients are really the only ones that will know how to deal with
syncpoints.

Note that host1x clients are always guaranteed to be children of host1x,
regardless of their location in the device tree.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Refactor channel allocation code</title>
<updated>2017-06-15T12:25:38Z</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2017-06-14T23:18:42Z</published>
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<id>urn:sha1:8474b02531c4881a762c52ef869c52429e38633f</id>
<content type='text'>
This is largely a rewrite of the Host1x channel allocation code, bringing
several changes:

- The previous code could deadlock due to an interaction
  between the 'reflock' mutex and CDMA timeout handling.
  This gets rid of the mutex.
- Support for more than 32 channels, required for Tegra186
- General refactoring, including better encapsulation
  of channel ownership handling into channel.c

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Reviewed-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Tested-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Fix error handling</title>
<updated>2016-11-07T12:01:42Z</updated>
<author>
<name>Christophe Jaillet</name>
<email>christophe.jaillet@wanadoo.fr</email>
</author>
<published>2016-07-03T06:18:57Z</published>
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<id>urn:sha1:87ba3e15fb6e94d8dcce838b5de71814b2d1a768</id>
<content type='text'>
It is likely that checking 'gr3d-&gt;clk_secondary' instead of 'gr3d-&gt;clk'
is expected here.

Signed-off-by: Christophe JAILLET &lt;christophe.jaillet@wanadoo.fr&gt;
Reviewed-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2014-08-08T18:00:26Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2014-08-08T18:00:26Z</published>
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<id>urn:sha1:44c916d58b9ef1f2c4aec2def57fa8289c716a60</id>
<content type='text'>
Pull ARM SoC cleanups from Olof Johansson:
 "This merge window brings a good size of cleanups on various platforms.
  Among the bigger ones:

   - Removal of Samsung s5pc100 and s5p64xx platforms.  Both of these
     have lacked active support for quite a while, and after asking
     around nobody showed interest in keeping them around.  If needed,
     they could be resurrected in the future but it's more likely that
     we would prefer reintroduction of them as DT and
     multiplatform-enabled platforms instead.

   - OMAP4 controller code register define diet.  They defined a lot of
     registers that were never actually used, etc.

   - Move of some of the Tegra platform code (PMC, APBIO, fuse,
     powergate) to drivers/soc so it can be shared with 64-bit code.
     This also converts them over to traditional driver models where
     possible.

   - Removal of legacy gpio-samsung driver, since the last users have
     been removed (moved to pinctrl)

  Plus a bunch of smaller changes for various platforms that sort of
  dissapear in the diffstat for the above.  clps711x cleanups, shmobile
  header file refactoring/moves for multiplatform friendliness, some
  misc cleanups, etc"

* tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (117 commits)
  drivers: CCI: Correct use of ! and &amp;
  video: clcd-versatile: Depend on ARM
  video: fix up versatile CLCD helper move
  MAINTAINERS: Add sdhci-st file to ARCH/STI architecture
  ARM: EXYNOS: Fix build breakge with PM_SLEEP=n
  MAINTAINERS: Remove Kirkwood
  ARM: tegra: Convert PMC to a driver
  soc/tegra: fuse: Set up in early initcall
  ARM: tegra: Always lock the CPU reset vector
  ARM: tegra: Setup CPU hotplug in a pure initcall
  soc/tegra: Implement runtime check for Tegra SoCs
  soc/tegra: fuse: fix dummy functions
  soc/tegra: fuse: move APB DMA into Tegra20 fuse driver
  soc/tegra: Add efuse and apbmisc bindings
  soc/tegra: Add efuse driver for Tegra
  ARM: tegra: move fuse exports to soc/tegra/fuse.h
  ARM: tegra: export apb dma readl/writel
  ARM: tegra: Use a function to get the chip ID
  ARM: tegra: Sort includes alphabetically
  ARM: tegra: Move includes to include/soc/tegra
  ...
</content>
</entry>
<entry>
<title>drm/tegra: add MODULE_DEVICE_TABLEs</title>
<updated>2014-08-04T08:07:39Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2014-06-18T22:21:55Z</published>
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<id>urn:sha1:ef70728c7a6571a1a7115031e932b811f1740b2e</id>
<content type='text'>
When tegra-drm.ko is built as a module, these MODULE_DEVICE_TABLEs allow
the module to be auto-loaded since the module will match the devices
instantiated from device tree.

(Notes for stable: in 3.14+, just git rm any conflicting file, since they
are added in later kernels. For 3.13 and below, manual merging will be
needed)

Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: Convert PMC to a driver</title>
<updated>2014-07-17T12:58:43Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2014-07-11T11:19:06Z</published>
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<id>urn:sha1:7232398abc6a7186e315425638c367d50c674718</id>
<content type='text'>
This commit converts the PMC support code to a platform driver. Because
the boot process needs to call into this driver very early, also set up
a minimal environment via an early initcall.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
</feed>
