kernel/drivers/gpu/drm/tegra/drm.c, branch linux-5.1.y

drm/tegra: Restrict IOVA space to DMA mask

2019-02-07T17:29:00Z

On Tegra186 and later, the ARM SMMU provides an input address space that is 48 bits wide. However, memory clients can only address up to 40 bits. If the geometry is used as-is, allocations of IOVA space can end up in a region that cannot be addressed by the memory clients. To fix this, restrict the IOVA space to the DMA mask of the host1x device. Note that, technically, the IOVA space needs to be restricted to the intersection of the DMA masks for all clients that are attached to the IOMMU domain. In practice using the DMA mask of the host1x device is sufficient because all host1x clients share the same DMA mask. Signed-off-by: Thierry Reding

drm/tegra: Setup shared IOMMU domain after initialization

2019-02-07T17:29:00Z

Move initialization of the shared IOMMU domain after the host1x device has been initialized. At this point all the Tegra DRM clients have been attached to the shared IOMMU domain. This is important because Tegra186 and later use an ARM SMMU, for which the driver defers setting up the geometry for a domain until a device is attached to it. This is to ensure that the domain is properly set up for a specific ARM SMMU instance, which is unknown at allocation time. Reviewed-by: Dmitry Osipenko Signed-off-by: Thierry Reding

drm/tegra: Store parent pointer in Tegra DRM clients

2019-02-07T17:28:59Z

Tegra DRM clients need access to their parent, so store a pointer to it upon registration. It's technically possible to get at this by going via the host1x client's parent and getting the driver data, but that's quite complicated and not very transparent. It's much more straightforward and natural to let the children know about their parent. Signed-off-by: Thierry Reding Reviewed-by: Dmitry Osipenko

drm/tegra: vic: Add Tegra194 support

2018-11-29T16:11:50Z

The Video Image Composer (VIC) generation found on Tegra194 is backwards compatible with its predecessor found on Tegra186. Reviewed-by: Mikko Perttunen Signed-off-by: Thierry Reding

Merge tag 'drm/tegra/for-4.20-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next

2018-09-27T23:47:31Z

drm/tegra: Changes for v4.20-rc1 This contains initial Tegra194 support as well as a couple of fixes for DMA/IOMMU integration. Signed-off-by: Dave Airlie From: Thierry Reding Link: https://patchwork.freedesktop.org/patch/msgid/20180927205051.30017-1-thierry.reding@gmail.com

drm/tegra: Detach devices from IOMMU DMA domain on arm32

2018-09-26T15:24:02Z

All Tegra DRM devices are getting attached to an implicit IOMMU DMA domain if CONFIG_ARM_DMA_USE_IOMMU=y. Since Tegra DRM driver manages IOMMU by itself, the devices must be detached from the implicit domain using arch-specific IOMMU-API. Note that this works only for arm32 and not for arm64, which will remain broken if CONFIG_IOMMU_DMA is enabled. Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding

drm/tegra: Replace drm_dev_unref with drm_dev_put

2018-09-26T15:04:03Z

This patch unifies the naming of DRM functions for reference counting of struct drm_device. The resulting code is more aligned with the rest of the Linux kernel interfaces. Signed-off-by: Thomas Zimmermann Signed-off-by: Thierry Reding Link: https://patchwork.freedesktop.org/patch/msgid/20180926115640.24755-1-tzimmermann@suse.de

drm/tegra: sor: Add Tegra194 support

2018-09-26T14:05:09Z

The SOR implemented in Tegra194 is subtly different from its predecessor found in Tegra186. Most notably some registers have been moved around so it is no longer compatible. Signed-off-by: Thierry Reding

drm/tegra: dc: Add Tegra194 support

2018-09-26T14:04:39Z

The display controllers found on Tegra194 are almost identical to those found on Tegra186. Signed-off-by: Thierry Reding

drm/tegra: hub: Add Tegra194 support

2018-09-26T14:04:10Z

The display hub integrated into Tegra194 is almost identical to the one found on Tegra186. However, it doesn't support DSC (display stream compression) so it isn't fully compatible. Signed-off-by: Thierry Reding