kernel/drivers/gpu/drm/tegra/drm.c, branch linux-4.17.y

drm/tegra: Fix comparison operator for buffer size

2018-08-24T11:07:03Z

[ Upstream commit 5265f0338bc0feec6c0d544dfe005dec1a93cb93 ] Here we are checking for the buffer length, not an offset for writing to, so using > is correct. The current code incorrectly rejects a command buffer ending at the memory buffer's end. Signed-off-by: Mikko Perttunen Reviewed-by: Dmitry Osipenko Signed-off-by: Thierry Reding Signed-off-by: Sasha Levin Signed-off-by: Greg Kroah-Hartman

Backmerge tag 'v4.16-rc7' into drm-next

2018-03-28T04:30:41Z

Linux 4.16-rc7 This was requested by Daniel, and things were getting a bit hard to reconcile, most of the conflicts were trivial though.

drm/tegra: Shutdown on driver unbind

2018-03-19T08:57:32Z

Since commit 846c7dfc1193 ("drm/atomic: Try to preserve the crtc enabled state in drm_atomic_remove_fb, v2."), removing the last framebuffer will no longer disable the corresponding pipeline, which causes the KMS core to complain about leaked connectors on driver unbind. Fix this by calling drm_atomic_helper_shutdown() on driver unbind, which will cause all display pipelines to be shut down and therefore drop the extra references on the connectors. Signed-off-by: Thierry Reding

drm/tegra: hub: Use private object for global state

2018-03-16T23:03:36Z

Rather than subclass the global atomic state to store the hub display clock and rate, create a private object and store this data in its state. Signed-off-by: Thierry Reding

Merge tag 'drm/tegra/for-4.16-rc1-fixes' of git://anongit.freedesktop.org/tegra/linux into drm-next

2018-01-12T01:46:19Z

drm/tegra: Changes for v4.16-rc1 The bulk of these changes are preparation work and addition of support for Tegra186. Currently only HDMI output (the primary output on Jetson TX2) is supported, but the hardware is also capable of doing DSI and DisplayPort. Tegra DRM now also uses the atomic commit helpers instead of the open- coded variant that was only doing half its job. As a bit of a byproduct of the Tegra186 support the driver also gained HDMI 2.0 as well as zpos property support. Along the way there are also a few patches to clean up a few things and fix minor issues. * tag 'drm/tegra/for-4.16-rc1-fixes' of git://anongit.freedesktop.org/tegra/linux: (51 commits) drm/tegra: dc: Properly cleanup overlay planes drm/tegra: dc: Fix possible_crtcs mask for planes drm/tegra: dc: Restore YUV overlay support drm/tegra: dc: Implement legacy blending drm/tegra: Correct timeout in tegra_syncpt_wait drm/tegra: gem: Correct iommu_map_sg() error checking drm/tegra: dc: Link DC1 to DC0 on Tegra20 drm/tegra: Fix non-debugfs builds drm/tegra: dpaux: Keep reset defaults for hybrid pad parameters drm/tegra: Mark Tegra186 display hub PM functions __maybe_unused drm/tegra: Use IOMMU groups gpu: host1x: Use IOMMU groups drm/tegra: Implement zpos property drm/tegra: dc: Remove redundant spinlock drm/tegra: dc: Use direct offset to plane registers drm/tegra: dc: Support more formats drm/tegra: fb: Force alpha formats drm/tegra: dpaux: Add Tegra186 support drm/tegra: dpaux: Implement runtime PM drm/tegra: sor: Support HDMI 2.0 modes ...

drm/tegra: Correct timeout in tegra_syncpt_wait

2017-12-21T13:52:39Z

host1x_syncpt_wait() takes timeout value in jiffies, but DRM passes it in milliseconds. Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding

drm/tegra: Implement zpos property

2017-12-21T13:52:35Z

Implement the standard zpos property for planes on Tegra124 and later. Earlier generations have a different blending unit that needs different programming. Signed-off-by: Thierry Reding

drm/tegra: sor: Add Tegra186 support

2017-12-13T13:36:36Z

The SOR found on Tegra186 is very similar to the one found on Tegra210 and earlier. However, due to some changes in the display architecture, some programming sequences have changed and some register have moved around. Signed-off-by: Thierry Reding

drm/tegra: dc: Add Tegra186 support

2017-12-13T13:16:38Z

The display architecture has changed in several signifcant ways with the new Tegra186 SoC. Display controllers are a completely different design, but have been given a frontend that simulates the register interface for earlier chips. Unfortunately the frontend isn't completely backwards compatible, so the driver needs parameterization to take the changes into account. One big change is that the total number of display controllers has been increased to three. At the same time the number of planes available has remained constant. However, planes can now be freely assigned between the display controllers, giving applications more flexibility in making the best use of the available resources. Signed-off-by: Thierry Reding

drm/tegra: Add Tegra186 display hub support

2017-12-13T13:16:37Z

The display architecture has changed in several significant ways with the new Tegra186 SoC. Shared between all display controllers is a set of common resources referred to as the display hub. The hub generates accesses to memory and feeds them into various composition pipelines, each of which being a window that can be assigned to arbitrary heads. Atomic state is subclassed in order to track the global bandwidth requirements and select and adjust the hub clocks appropriately. The plane code is shared to a large degree with earlier SoC generations, except where the programming differs. Signed-off-by: Thierry Reding