kernel/drivers/gpu/drm/tegra/dc.h, branch linux-5.1.y

drm/tegra: dc: Add Tegra194 support

2018-09-26T14:04:39Z

The display controllers found on Tegra194 are almost identical to those found on Tegra186. Signed-off-by: Thierry Reding

drm/tegra: dc: Rename supports_blending to has_legacy_blending

2018-05-17T12:08:44Z

Older Tegra chips do support blending as well. Rename the SoC info entry .supports_blending to .has_legacy_blending to eliminate the confusion. Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding

drm/tegra: dc: Enable plane scaling filters

2018-05-17T12:08:44Z

Currently resized plane produces a "pixelated" image which doesn't look nice, especially in a case of a video overlay. Enable scaling filters that significantly improve image quality of a scaled overlay. Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding

drm/tegra: dc: Balance IOMMU group refcounting

2018-05-04T12:19:14Z

Remove unneeded iommu_group_get() and add missing iommu_group_put(), correcting IOMMU group refcount. This is a minor correction / cleanup that doesn't really fix anything because Tegra's IOMMU driver are built-in and hence groups refcounting can't hold IOMMU driver from unloading. Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding

drm/tegra: plane: Support format modifiers

2018-03-15T18:06:11Z

Pass the list of valid format modifiers to planes upon initialization and implement the ->format_mod_supported() callback so that userspace can query for the valid combinations of formats and modifiers. Signed-off-by: Thierry Reding

drm/tegra: dc: Implement legacy blending

2017-12-21T13:55:55Z

This implements alpha blending on legacy display controllers (Tegra20, Tegra30 and Tegra114). While it's theoretically possible to support the zpos property to enable userspace to specify the Z-order of each plane individually, this is not currently supported and the same fixed Z- order as previously defined is used. Reverts commit 71835caa00e8 ("drm/tegra: fb: Force alpha formats") since the opaque formats are now supported. Reported-by: Dmitry Osipenko Fixes: 7772fdaef939 ("drm/tegra: Support ARGB and ABGR formats") Signed-off-by: Thierry Reding

drm/tegra: dc: Link DC1 to DC0 on Tegra20

2017-12-21T13:52:38Z

Hardware reset isn't actually broken on Tegra20, but there is a dependency on the first display controller to be taken out of reset for the second to be enabled successfully. Model this dependency using a PM device link. Signed-off-by: Dmitry Osipenko [treding@nvidia.com: minor cleanups, extend commit message] Signed-off-by: Thierry Reding

drm/tegra: Implement zpos property

2017-12-21T13:52:35Z

Implement the standard zpos property for planes on Tegra124 and later. Earlier generations have a different blending unit that needs different programming. Signed-off-by: Thierry Reding

drm/tegra: dc: Remove redundant spinlock

2017-12-21T13:52:35Z

The spinlock is only used to serialize accesses to the DC_CMD_INT_MASK register. However, this register is accesses either with interrupts masked (in tegra_crtc_atomic_enable()) or protected by the vbl_lock and vblank_time_lock spinlocks of the DRM device. Therefore, these accesses don't need any extra serialization and the lock can be removed. Signed-off-by: Thierry Reding

drm/tegra: dc: Support more formats

2017-12-21T13:52:29Z

Also, split up formats into per-SoC lists because not all generations support all of them. Note that the list is now exhaustive for all RGB formats, but not for YUV and indexed formats. Signed-off-by: Thierry Reding