kernel/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/Kbuild, branch linux-4.17.y

drm/nouveau/secboot/gp108: implement on top of acr_r370

2018-02-02T05:24:05Z

Signed-off-by: Ben Skeggs Reviewed-by: Gourav Samaiya

drm/nouveau/secboot/r370: move a bunch of r375 stuff to a new implementation

2018-02-02T05:24:04Z

It's entirely possibly that the other r375 code is relevant to r370 too, but I've not confirmed this, so I'll leave it where it is for now. NVIDIA's copyright headers maintained, as it's still all their code. Signed-off-by: Ben Skeggs Reviewed-by: Gourav Samaiya

drm/nouveau/secboot: add GP10B support

2017-04-06T04:39:04Z

GP10B's secboot is largely similar to GM20B's. Only differences are MC base address and the fact that GPCCS is also securely managed. Signed-off-by: Alexandre Courbot Signed-off-by: Ben Skeggs

drm/nouveau/secboot: add gp102/gp104/gp106/gp107 support

2017-03-07T07:05:16Z

These gp10x chips are supporting using (roughly) the same firmware. Compared to previous secure chips, ACR runs on SEC2 and so does the low-secure msgqueue. ACR for these chips is based on r367. Signed-off-by: Alexandre Courbot Signed-off-by: Ben Skeggs

drm/nouveau/secboot: put HS code loading code into own file

2017-03-07T07:05:16Z

We will also need to load HS blobs outside of acr_r352 (for instance, to run the NVDEC VPR scrubber), so make this code reusable. Signed-off-by: Alexandre Courbot Signed-off-by: Ben Skeggs

drm/nouveau/secboot: support for r375 ACR

2017-03-07T07:05:16Z

r375 ACR uses a unified bootloader descriptor for the GR and PMU firmwares. Signed-off-by: Alexandre Courbot Signed-off-by: Ben Skeggs

drm/nouveau/secboot: support for r367 ACR

2017-03-07T07:05:16Z

r367 uses a different hsflcn_desc layout and LS firmware signature format, requiring a rewrite of some functions. It also makes use of the shadow region, and uses SEC as the boot falcon. Signed-off-by: Alexandre Courbot Signed-off-by: Ben Skeggs

drm/nouveau/secboot: support for r364 ACR

2017-03-07T07:05:15Z

r364 is similar to r361, but uses a different hsflcn_desc structure to introduce the shadow region address (even though it is not yet used by this version). Signed-off-by: Alexandre Courbot Signed-off-by: Ben Skeggs

drm/nouveau/secboot: support for loading LS PMU firmware

2017-03-07T07:05:12Z

Allow secboot to load a LS PMU firmware. LS PMU is one instance of firmwares based on the message queue mechanism, which is also used for other firmwares like SEC, so name its source file accordingly. Signed-off-by: Alexandre Courbot Signed-off-by: Ben Skeggs

drm/nouveau/secboot: reorganize into more files

2017-02-17T05:14:31Z

Split the act of building the ACR blob from firmware files from the rest of the (chip-dependent) secure boot logic. ACR logic is moved into acr_rxxx.c files, where rxxx corresponds to the compatible release of the NVIDIA driver. At the moment r352 and r361 are supported since firmwares have been released for these versions. Some abstractions are added on top of r352 so r361 can easily be implemented on top of it by just overriding a few hooks. This split makes it possible and easy to reuse the same ACR version on different chips. It also hopefully makes the code much more readable as the different secure boot logics are separated. As more chips and firmware versions will be supported, this is a necessity to not get lost in code that is already quite complex. This is a big commit, but it essentially moves things around (and split the nvkm_secboot structure into two, nvkm_secboot and nvkm_acr). Code semantics should not be affected. Signed-off-by: Alexandre Courbot Signed-off-by: Ben Skeggs