kernel/drivers/gpu/drm/nouveau/include/nvkm/subdev/secboot.h, branch linux-4.17.y

drm/nouveau/secboot/gp108: implement on top of acr_r370

2018-02-02T05:24:05Z

Signed-off-by: Ben Skeggs Reviewed-by: Gourav Samaiya

drm/nouveau/secboot: add GP10B support

2017-04-06T04:39:04Z

GP10B's secboot is largely similar to GM20B's. Only differences are MC base address and the fact that GPCCS is also securely managed. Signed-off-by: Alexandre Courbot Signed-off-by: Ben Skeggs

drm/nouveau/secboot: allow to boot multiple falcons

2017-04-06T04:39:03Z

Change the secboot and msgqueue interfaces to take a mask of falcons to reset instead of a single falcon. The GP10B firmware interface requires FECS and GPCCS to be booted in a single firmware command. For firmwares that only support single falcon boot, it is trivial to loop over the mask and boot each falcons individually. Signed-off-by: Alexandre Courbot Signed-off-by: Ben Skeggs

drm/nouveau/secboot: add gp102/gp104/gp106/gp107 support

2017-03-07T07:05:16Z

These gp10x chips are supporting using (roughly) the same firmware. Compared to previous secure chips, ACR runs on SEC2 and so does the low-secure msgqueue. ACR for these chips is based on r367. Signed-off-by: Alexandre Courbot Signed-off-by: Ben Skeggs

drm/nouveau/secboot: support for different load and unload falcons

2017-03-07T07:05:13Z

On some secure boot instances (e.g. gp10x) the load and unload blobs do not run on the same falcon. Support this case by introducing a new member to the ACR structure and making related functions take the falcon to use as an argument instead of assuming the boot falcon is to be used. The rule is that the load blob can be run on either the SEC or PMU falcons, but the unload blob must be always run on PMU. Signed-off-by: Alexandre Courbot Signed-off-by: Ben Skeggs

drm/nouveau/secboot: support running ACR on SEC

2017-03-07T07:05:13Z

Add support for running the ACR binary on the SEC falcon. Signed-off-by: Alexandre Courbot Signed-off-by: Ben Skeggs

drm/nouveau/secboot: make nvkm_secboot_falcon_name visible

2017-03-07T07:05:11Z

Make nvkm_secboot_falcon_name publicly visible as other subdevs will need to use it for debug messages. Signed-off-by: Alexandre Courbot Signed-off-by: Ben Skeggs

drm/nouveau/secboot: split reset function

2017-02-17T05:14:31Z

Split the reset function into more meaningful and reusable ones. Signed-off-by: Alexandre Courbot Signed-off-by: Ben Skeggs

drm/nouveau/secboot: reorganize into more files

2017-02-17T05:14:31Z

Split the act of building the ACR blob from firmware files from the rest of the (chip-dependent) secure boot logic. ACR logic is moved into acr_rxxx.c files, where rxxx corresponds to the compatible release of the NVIDIA driver. At the moment r352 and r361 are supported since firmwares have been released for these versions. Some abstractions are added on top of r352 so r361 can easily be implemented on top of it by just overriding a few hooks. This split makes it possible and easy to reuse the same ACR version on different chips. It also hopefully makes the code much more readable as the different secure boot logics are separated. As more chips and firmware versions will be supported, this is a necessity to not get lost in code that is already quite complex. This is a big commit, but it essentially moves things around (and split the nvkm_secboot structure into two, nvkm_secboot and nvkm_acr). Code semantics should not be affected. Signed-off-by: Alexandre Courbot Signed-off-by: Ben Skeggs

drm/nouveau/secboot: remove nvkm_secboot_start()

2017-02-17T05:14:31Z

Since GR has moved to using the falcon library to start the falcons, this function is not needed anymore. Signed-off-by: Alexandre Courbot Signed-off-by: Ben Skeggs