<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/drivers/gpu/drm/msm/dsi/dsi_host.c, branch linux-rolling-stable</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-rolling-stable</id>
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<updated>2026-03-19T15:14:49Z</updated>
<entry>
<title>drm/msm/dsi: fix pclk rate calculation for bonded dsi</title>
<updated>2026-03-19T15:14:49Z</updated>
<author>
<name>Pengyu Luo</name>
<email>mitltlatltl@gmail.com</email>
</author>
<published>2026-03-06T16:32:38Z</published>
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<id>urn:sha1:33c8dba6894dc916ba3d64c3101176d6b65f852f</id>
<content type='text'>
[ Upstream commit e4eb11b34d6c84f398d8f08d7cb4d6c38e739dd2 ]

Recently, we round up new_hdisplay once at most, for bonded dsi, we
may need twice, since they are independent links, we should round up
each half separately. This also aligns with the hdisplay we program
later in dsi_timing_setup()

Example:
	full_hdisplay = 1904, dsc_bpp = 8, bpc = 8
	new_full_hdisplay = DIV_ROUND_UP(1904 * 8, 8 * 3) = 635

if we use half display
	new_half_hdisplay = DIV_ROUND_UP(952 * 8, 8 * 3) = 318
	new_full_display = 636

Fixes: 7c9e4a554d4a ("drm/msm/dsi: Reduce pclk rate for compression")
Signed-off-by: Pengyu Luo &lt;mitltlatltl@gmail.com&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Patchwork: https://patchwork.freedesktop.org/patch/709716/
Link: https://lore.kernel.org/r/20260306163255.215456-1-mitltlatltl@gmail.com
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/dsi: fix hdisplay calculation when programming dsi registers</title>
<updated>2026-03-19T15:14:48Z</updated>
<author>
<name>Pengyu Luo</name>
<email>mitltlatltl@gmail.com</email>
</author>
<published>2026-02-14T10:51:28Z</published>
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<id>urn:sha1:e602b16c8cf75483e0d247e9613f9dfb32a979fc</id>
<content type='text'>
[ Upstream commit ac47870fd795549f03d57e0879fc730c79119f4b ]

Recently, the hdisplay calculation is working for 3:1 compressed ratio
only. If we have a video panel with DSC BPP = 8, and BPC = 10, we still
use the default bits_per_pclk = 24, then we get the wrong hdisplay. We
can draw the conclusion by cross-comparing the calculation with the
calculation in dsi_adjust_pclk_for_compression().

Since CMD mode does not use this, we can remove
!(msm_host-&gt;mode_flags &amp; MIPI_DSI_MODE_VIDEO) safely.

Fixes: efcbd6f9cdeb ("drm/msm/dsi: Enable widebus for DSI")
Signed-off-by: Pengyu Luo &lt;mitltlatltl@gmail.com&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Patchwork: https://patchwork.freedesktop.org/patch/704822/
Link: https://lore.kernel.org/r/20260214105145.105308-1-mitltlatltl@gmail.com
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/msm: Use drm_gpuvm types more</title>
<updated>2025-07-05T00:48:35Z</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@chromium.org</email>
</author>
<published>2025-06-29T20:12:58Z</published>
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<id>urn:sha1:37889600f58ea554943d48a86e30f635005f6712</id>
<content type='text'>
Most of the driver code doesn't need to reach in to msm specific fields,
so just use the drm_gpuvm/drm_gpuva types directly.  This should
hopefully improve commonality with other drivers and make the code
easier to understand.

Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Signed-off-by: Rob Clark &lt;robin.clark@oss.qualcomm.com&gt;
Tested-by: Antonino Maniscalco &lt;antomani103@gmail.com&gt;
Reviewed-by: Antonino Maniscalco &lt;antomani103@gmail.com&gt;
Patchwork: https://patchwork.freedesktop.org/patch/661483/
</content>
</entry>
<entry>
<title>drm/msm: Rename msm_gem_address_space -&gt; msm_gem_vm</title>
<updated>2025-07-04T18:09:44Z</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@chromium.org</email>
</author>
<published>2025-06-29T20:12:49Z</published>
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<id>urn:sha1:057e55f337c5bb2aecc8967dc045c266a4e6c49d</id>
<content type='text'>
Re-aligning naming to better match drm_gpuvm terminology will make
things less confusing at the end of the drm_gpuvm conversion.

This is just rename churn, no functional change.

Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Signed-off-by: Rob Clark &lt;robin.clark@oss.qualcomm.com&gt;
Tested-by: Antonino Maniscalco &lt;antomani103@gmail.com&gt;
Reviewed-by: Antonino Maniscalco &lt;antomani103@gmail.com&gt;
Patchwork: https://patchwork.freedesktop.org/patch/661466/
</content>
</entry>
<entry>
<title>drm/msm/dsi: Add support for SM8750</title>
<updated>2025-07-04T13:35:19Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2025-06-18T14:32:36Z</published>
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<id>urn:sha1:80dd5911cbfdc2f6ae904341d41a7a8bd8cc546c</id>
<content type='text'>
Add support for DSI on Qualcomm SM8750 SoC with notable difference:

DSI PHY PLLs, the parents of pixel and byte clocks, cannot be used as
parents before DSI PHY is configured, the PLLs are prepared and their
initial rate is set.  Therefore assigned-clock-parents are not working
here and driver is responsible for reparenting clocks with proper
procedure: see dsi_clk_init_6g_v2_9().

Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Patchwork: https://patchwork.freedesktop.org/patch/659619/
Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-7-a591c609743d@linaro.org
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
</content>
</entry>
<entry>
<title>drm/msm/dsi: Add check for devm_kstrdup()</title>
<updated>2025-02-26T10:15:49Z</updated>
<author>
<name>Haoxiang Li</name>
<email>haoxiang_li2024@163.com</email>
</author>
<published>2025-02-19T04:07:12Z</published>
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<id>urn:sha1:52b3f0e118b1700e5c60ff676a1f522ce44fadc8</id>
<content type='text'>
Add check for the return value of devm_kstrdup() in
dsi_host_parse_dt() to catch potential exception.

Fixes: 958d8d99ccb3 ("drm/msm/dsi: parse vsync source from device tree")
Cc: stable@vger.kernel.org
Signed-off-by: Haoxiang Li &lt;haoxiang_li2024@163.com&gt;
Reviewed-by: Abhinav Kumar &lt;quic_abhinavk@quicinc.com&gt;
Patchwork: https://patchwork.freedesktop.org/patch/638297/
Link: https://lore.kernel.org/r/20250219040712.2598161-1-haoxiang_li2024@163.com
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/dsi: Allow values of 10 and 12 for bits per component</title>
<updated>2025-02-26T10:15:49Z</updated>
<author>
<name>Eugene Lepshy</name>
<email>fekz115@gmail.com</email>
</author>
<published>2025-02-17T22:24:30Z</published>
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<id>urn:sha1:b0e71c2637d1b99ff7093582cd3c9f0960619878</id>
<content type='text'>
The DRM DSC helper has various bits_per_component values - not just 8.
But the DSC 1.1 block supports only 8, 10, and 12. Extend the guard
accordingly and add a comment noting this limitation.

Signed-off-by: Eugene Lepshy &lt;fekz115@gmail.com&gt;
Co-developed-by: Danila Tikhonov &lt;danila@jiaxyga.com&gt;
Signed-off-by: Danila Tikhonov &lt;danila@jiaxyga.com&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Patchwork: https://patchwork.freedesktop.org/patch/637831/
Link: https://lore.kernel.org/r/20250217222431.82522-4-danila@jiaxyga.com
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/dsi: Use existing per-interface slice count in DSC timing</title>
<updated>2025-02-26T10:15:48Z</updated>
<author>
<name>Marijn Suijten</name>
<email>marijn.suijten@somainline.org</email>
</author>
<published>2025-02-17T11:17:41Z</published>
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<id>urn:sha1:14ad809ceb66d0874cbe4bd5ca9edf0de8d9ad96</id>
<content type='text'>
When configuring the timing of DSI hosts (interfaces) in
dsi_timing_setup() all values written to registers are taking
bonded-mode into account by dividing the original mode width by 2
(half the data is sent over each of the two DSI hosts), but the full
width instead of the interface width is passed as hdisplay parameter to
dsi_update_dsc_timing().

Currently only msm_dsc_get_slices_per_intf() is called within
dsi_update_dsc_timing() with the `hdisplay` argument which clearly
documents that it wants the width of a single interface (which, again,
in bonded DSI mode is half the total width of the mode) resulting in all
subsequent values to be completely off.

However, as soon as we start to pass the halved hdisplay
into dsi_update_dsc_timing() we might as well discard
msm_dsc_get_slices_per_intf() since the value it calculates is already
available in dsc-&gt;slice_count which is per-interface by the current
design of MSM DPU/DSI implementations and their use of the DRM DSC
helpers.

Fixes: 08802f515c3c ("drm/msm/dsi: Add support for DSC configuration")
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Reviewed-by: Jessica Zhang &lt;quic_jesszhan@quicinc.com&gt;
Signed-off-by: Marijn Suijten &lt;marijn.suijten@somainline.org&gt;
Patchwork: https://patchwork.freedesktop.org/patch/637648/
Link: https://lore.kernel.org/r/20250217-drm-msm-initial-dualpipe-dsc-fixes-v3-1-913100d6103f@somainline.org
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/dsi: Drop unnecessary -ENOMEM message</title>
<updated>2025-02-26T10:15:48Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2025-02-14T13:17:47Z</published>
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<id>urn:sha1:b39e7014ed3121f980d55097ec2bd9ecee3adc83</id>
<content type='text'>
Kernel core already prints detailed report about memory allocation
failures, so drivers should not have their own error messages.

Reviewed-by: Abhinav Kumar &lt;quic_abhinavk@quicinc.com&gt;
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Patchwork: https://patchwork.freedesktop.org/patch/637308/
Link: https://lore.kernel.org/r/20250214-drm-msm-cleanups-v2-4-1bec50f37dc1@linaro.org
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/dsi: Minor whitespace and style cleanup</title>
<updated>2025-02-26T10:15:48Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2025-02-14T13:17:46Z</published>
<link rel='alternate' type='text/html' href='https://universe.0xinfinity.dev/distro/kernel/commit/?id=cce156257ed3414ab104dc2360c5c4eb03ce7ed3'/>
<id>urn:sha1:cce156257ed3414ab104dc2360c5c4eb03ce7ed3</id>
<content type='text'>
Cleanup few obvious kernel coding style violations: missing or
unnecessary braces in 'if-else', unnecessary break lines, incorrect
breaking of long function declarations, unnecessary 'else' after a
'return'.  No functional impact expected.

Reviewed-by: Abhinav Kumar &lt;quic_abhinavk@quicinc.com&gt;
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Patchwork: https://patchwork.freedesktop.org/patch/637305/
Link: https://lore.kernel.org/r/20250214-drm-msm-cleanups-v2-3-1bec50f37dc1@linaro.org
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
</content>
</entry>
</feed>
