kernel/drivers/gpu/drm/msm/Makefile, branch linux-5.1.y

drm: prefix header search paths with $(srctree)/

2019-05-31T13:43:22Z

[ Upstream commit 43068cb7ba1f6ceb1523e947c84002b2a61fd6d4 ] Currently, the Kbuild core manipulates header search paths in a crazy way [1]. To fix this mess, I want all Makefiles to add explicit $(srctree)/ to the search paths in the srctree. Some Makefiles are already written in that way, but not all. The goal of this work is to make the notation consistent, and finally get rid of the gross hacks. Having whitespaces after -I does not matter since commit 48f6e3cf5bc6 ("kbuild: do not drop -I without parameter"). [1]: https://patchwork.kernel.org/patch/9632347/ Signed-off-by: Masahiro Yamada Reviewed-by: Sam Ravnborg Reviewed-by: James Qian Wang (Arm Technology China) Acked-by: Liviu Dudau Signed-off-by: Daniel Vetter Link: https://patchwork.freedesktop.org/patch/msgid/1553859161-2628-1-git-send-email-yamada.masahiro@socionext.com Signed-off-by: Sasha Levin

drm/msm/dpu: Remove dpu_irq and unused functions

2018-12-11T18:10:18Z

dpu_irq.c does some unneeded checks and passes control to dpu_core_irq.c The simple functions can be defined in the same file where we use them and the files and their associated hangers on can be deleted. Additionally the postinstall hook isn't used even in dpu_core_irq.c so zap that entire path. v3: No changes Reviewed-by: Sean Paul Signed-off-by: Jordan Crouse Signed-off-by: Sean Paul Signed-off-by: Rob Clark

drm/msm/dpu: Remove dpu_dbg

2018-12-11T18:10:16Z

The functions in dpu_dbg.c aren't used. The two main dump functions fail after a lookup from dpu_dbg_base.reg_base_list which turns out to never be populated and once those are removed the rest of the file doesn't make any sense. v3: No changes v2: Moved some unrelated changes to another patch Reviewed-by: Sean Paul Signed-off-by: Jordan Crouse Signed-off-by: Sean Paul Signed-off-by: Rob Clark

drm/msm: dpu: Remove dpu_power_handle

2018-12-11T18:10:10Z

Now that we don't have any event handlers, remove dpu_power_handle! Changes in v2: - None Reviewed-by: Jeykumar Sankaran Signed-off-by: Sean Paul Signed-off-by: Rob Clark

drm/msm: implement a2xx mmu

2018-12-11T18:07:10Z

A2XX has its own very simple MMU. Added a msm_use_mmu() function because we can't rely on iommu_present to decide to use MMU or not. Signed-off-by: Jonathan Marek Signed-off-by: Rob Clark

drm/msm/adreno: add a2xx

2018-12-11T18:07:06Z

derived from the a3xx driver and tested on the following hardware: imx51-zii-rdu1 (a200 with 128kb gmem) imx53-qsrb (a200) msm8060-tenderloin (a220) Signed-off-by: Jonathan Marek Reviewed-by: Jordan Crouse Signed-off-by: Rob Clark

drm/msm/a6xx: Add a6xx gpu state

2018-12-11T18:05:30Z

Add support for gathering and dumping the a6xx GPU state including registers, GMU registers, indexed registers, shader blocks, context clusters and debugbus. v2: Fix bugs discovered by Sharat Masetty Signed-off-by: Jordan Crouse Signed-off-by: Rob Clark

drm/msm/gpu: Add trace events for tracking GPU submissions

2018-12-11T18:05:28Z

Add trace events to track the progress of a GPU submission msm_gpu_submit occurs at the beginning of the submissions, msm_gpu_submit_flush happens when the submission is put on the ringbuffer and msm_submit_flush_retired is sent when the operation is retired. To make it easier to track the operations a unique sequence number is assigned to each submission and displayed in each event output so a human or a script can easily associate the events related to a specific submission. Signed-off-by: Jordan Crouse Signed-off-by: Rob Clark

drm/msm/dpu: remove cdm block support from resource manager

2018-10-04T00:24:52Z

Support for CDM block is not present in DPU. Remove CDM handlers from resource manager. changes in v4: - Introduced in the series changes in v5: - Remove catalog references to CDM (Sean) Signed-off-by: Jeykumar Sankaran Signed-off-by: Sean Paul Signed-off-by: Rob Clark

drm/msm: Add A6XX device support

2018-08-10T22:49:18Z

Add support for the A6XX family of Adreno GPUs. The biggest addition is the GMU (Graphics Management Unit) which takes over most of the power management of the GPU itself but in a ironic twist of fate needs a goodly amount of management itself. Add support for the A6XX core code, the GMU and the HFI (hardware firmware interface) queue that the CPU uses to communicate with the GMU. Signed-off-by: Jordan Crouse Signed-off-by: Rob Clark