kernel/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c, branch linux-4.17.y

drm: Convert to using %pOF instead of full_name

2017-07-26T11:45:06Z

Now that we have a custom printf format specifier, convert users of full_name to use %pOF instead. This is preparation to remove storing of the full path string for each node. Signed-off-by: Rob Herring Cc: Russell King Cc: David Airlie Cc: Daniel Vetter Cc: Jani Nikula Cc: Sean Paul Cc: Inki Dae Cc: Joonyoung Shim Cc: Seung-Woo Kim Cc: Kyungmin Park Cc: Kukjin Kim Cc: Krzysztof Kozlowski Cc: Javier Martinez Canillas Cc: Xinliang Liu Cc: Rongrong Zou Cc: Xinwei Kong Cc: Chen Feng Cc: CK Hu Cc: Philipp Zabel Cc: Matthias Brugger Cc: Neil Armstrong Cc: Carlo Caione Cc: Kevin Hilman Cc: Thierry Reding Cc: Laurent Pinchart Cc: Mark Yao Cc: Heiko Stuebner Cc: Maxime Ripard Cc: Chen-Yu Tsai Cc: Jyri Sarha Cc: Tomi Valkeinen Cc: dri-devel@lists.freedesktop.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Cc: linux-mediatek@lists.infradead.org Cc: linux-amlogic@lists.infradead.org Cc: linux-renesas-soc@vger.kernel.org Cc: linux-rockchip@lists.infradead.org Partially-Reviewed-by: Laurent Pinchart Reviewed-by: Philipp Zabel Acked-by: Maxime Ripard [seanpaul changed subject prefix and fixed conflict in stm/ltdc.c] Signed-off-by: Sean Paul Signed-off-by: Daniel Vetter

drm/mediatek: separate color module to fixup error memory reallocation

2017-06-27T09:34:53Z

Previous patch (c5f228ef6c drm/mediatek: add *driver_data for different hardware settings) calls devm_kfree() and then devm_kzalloc() to reallocate color module data structure. But this reallocation cannnot guarantee the new address is unchanged, but the caller will use the old address, which is wrong. Fix it by separate color module from general components, this patch separate color module to independent files, like mtk_disp_ovl.c and mtk_disp_rdma.c do Fixes: c5f228ef6ccd ("drm/mediatek: add *driver_data for different hardware settings") Signed-off-by: YT Shen Tested-by: Bibby Hsieh Signed-off-by: CK Hu

drm/mediatek: add support for Mediatek SoC MT2701

2017-04-07T16:02:17Z

This patch add support for the Mediatek MT2701 DISP subsystem. There is only one OVL engine in MT2701. Signed-off-by: YT Shen Acked-by: CK Hu

drm/mediatek: add BLS component

2017-04-07T16:02:13Z

Add BLS component for PWM + GAMMA function Signed-off-by: YT Shen Acked-by: CK Hu

drm/mediatek: add *driver_data for different hardware settings

2017-04-07T16:02:12Z

There are some hardware settings changed, between MT8173 & MT2701: DISP_OVL address offset changed, color format definition changed. DISP_RDMA fifo size changed. DISP_COLOR offset changed. MIPI_TX pll setting changed. And add prefix for mtk_ddp_main & mtk_ddp_ext & mutex_mod. Signed-off-by: YT Shen Acked-by: CK Hu

drm/mediatek: fix a typo of DISP_OD_CFG to OD_RELAYMODE

2016-11-24T06:53:14Z

If we want to set the hardware OD to relay mode, we have to set DISP_OD_CFG register rather than OD_RELAYMODE; otherwise, the system will access the wrong address. Change-Id: Ifb9bb4caa63df906437d48b5d5326b6d04ea332a Fixes: 7216436420414144646f5d8343d061355fd23483 ("drm/mediatek: set mt8173 dithering function") Cc: stable@vger.kernel.org # v4.9+ Signed-off-by: Bibby Hsieh Acked-by: CK Hu

Revert "drm/mediatek: fix a typo of OD_CFG to OD_RELAYMODE"

2016-11-18T00:26:44Z

This reverts commit 83ba62bc700bab710b22be3a1bf6cf973f754273. Signed-off-by: Dave Airlie

drm/mediatek: fix a typo of OD_CFG to OD_RELAYMODE

2016-10-19T01:03:20Z

If we want to set the hardware OD to relay mode, we have to set OD_CFG register rather than OD_RELAYMODE; otherwise, the system will access the wrong address. Fixes: 7216436420414144646f5d8343d061355fd23483 ("drm/mediatek: set mt8173 dithering function") Cc: stable@vger.kernel.org # v4.9+ Signed-off-by: Bibby Hsieh Acked-by: CK Hu

drm/mediatek: set mt8173 dithering function

2016-08-11T08:52:23Z

Some panels only accept bpc (bit per color) 6-bit. But, the default bpc in mt8173 display data path is 8-bit. If we didn't enable dithering function to convert bpc, display cannot show the smooth grayscale image. In mt8173, the dithering function in OD (OverDrive) and GAMMA module, we have to config them with connector->display_mode.bpc when CRTC initial. 1. Clear the default value at *_DITHER_5 and *_DITHER_7 register. 2. Calculate the LSB_ERR_SHIFT bits and ADD_LSHIFT bits two values. i.e. Input bpc of OD is 10 bits, we assume the bpc of panel is 6-bit, so, we need to set 4-bit to LSB_ERR_SHIFT and ADD_LSHIFT bits respectively. 3. Then, set the OD or GAMMA to dithering mode depends on path-1 or path-2. Signed-off-by: Bibby Hsieh Signed-off-by: Philipp Zabel

drm/mediatek: Add gamma correction.

2016-08-11T08:52:22Z

Add gamma set function to correct brightness values. It applies arbitrary mapping curve to compensate the incorrect transfer function of the panel. Signed-off-by: Bibby Hsieh Signed-off-by: Philipp Zabel