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<title>kernel/drivers/gpu/drm/i915/intel_renderstate_gen7.c, branch linux-4.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.</subtitle>
<id>https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y</id>
<link rel='self' href='https://universe.0xinfinity.dev/distro/kernel/atom?h=linux-4.17.y'/>
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<updated>2014-12-10T16:47:23Z</updated>
<entry>
<title>drm/i915: Add headers to the various render state</title>
<updated>2014-12-10T16:47:23Z</updated>
<author>
<name>Damien Lespiau</name>
<email>damien.lespiau@intel.com</email>
</author>
<published>2014-12-09T17:23:22Z</published>
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<id>urn:sha1:16e5ab14d7828c461c346e78f9ba1e9bdd0257aa</id>
<content type='text'>
intel-gpu-tools now generates the render state with license headers and
the version of i-g-t that generated the files.

A similar patch was previously sent but wasn't actually generated with
the make target so was lacking the i-g-t revision. So here another
version before we totally forget about this.

Cc: Armin Reese &lt;armin.c.reese@intel.com&gt;
Cc: Mika Kuoppala &lt;mika.kuoppala@linux.intel.com&gt;
Signed-off-by: Damien Lespiau &lt;damien.lespiau@intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915: Simplify processing of the golden render context state</title>
<updated>2014-06-16T17:53:09Z</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2014-06-10T10:23:33Z</published>
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<id>urn:sha1:1ce826d436f33c8fc0cf8b51d213b496ea73e0a6</id>
<content type='text'>
Rewrite i915_gem_render_state.c for the purposes of clarity and
compactness, in the process we can eliminate some dodgy math that did
not handle 64bit addresses correctly.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Cc: Damien Lespiau &lt;damien.lespiau@intel.com&gt;
Cc: Mika Kuoppala &lt;mika.kuoppala@intel.com&gt;
Reviewed-by: Mika Kuoppala &lt;mika.kuoppala@intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915: add null render states for gen6, gen7 and gen8</title>
<updated>2014-05-14T17:17:08Z</updated>
<author>
<name>Mika Kuoppala</name>
<email>mika.kuoppala@linux.intel.com</email>
</author>
<published>2014-05-14T14:02:17Z</published>
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<id>urn:sha1:229b0489aa75a8c51d2f2e124329d3ac326f326d</id>
<content type='text'>
These are generated with intel-gpu-tools/tools/null_state_gen

v2: Don't use header file for states (Daniel Vetter)

v3: Proper URB state size for gen8/GT3 (Damien Lespiau)

Tested-by: Kristen Carlson Accardi &lt;kristen@linux.intel.com&gt; (v1)
Tested-by: Oscar Mateo &lt;oscar.mateo@intel.com&gt; (v2)
Acked-by: Damien Lespiau &lt;damien.lespiau@intel.com&gt;
Signed-off-by: Mika Kuoppala &lt;mika.kuoppala@intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915: add render state initialization</title>
<updated>2014-05-14T17:16:13Z</updated>
<author>
<name>Mika Kuoppala</name>
<email>mika.kuoppala@linux.intel.com</email>
</author>
<published>2014-05-14T14:02:16Z</published>
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<id>urn:sha1:9d0a6fa6c5e618bd978d625a215dc4a240ba3b3c</id>
<content type='text'>
HW guys say that it is not a cool idea to let device
go into rc6 without proper 3d pipeline state.

For each new uninitialized context, generate a
valid null render state to be run on context
creation.

This patch introduces a skeleton with empty states.

v2: - No need to vmap (Chris Wilson)
    - use .c files for state (Daniel Vetter)
    - no need to flush as i915_add_request does it
    - remove parameter for batch alloc size
    - don't wait for the init (Ben Widawsky)

v3: - move to cpu/gpu (Chris Wilson)

Tested-by: Kristen Carlson Accardi &lt;kristen@linux.intel.com&gt; (v1)
Tested-by: Oscar Mateo &lt;oscar.mateo@intel.com&gt;
Reviewed-by: Damien Lespiau &lt;damien.lespiau@intel.com&gt;
Signed-off-by: Mika Kuoppala &lt;mika.kuoppala@intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
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